clk: samsung: exynos850: Style fixes
Fix some typos in comments and do small coding style improvements. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220809113323.29965-5-semen.protsenko@linaro.org
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@ -173,7 +173,6 @@ PNAME(mout_peri_uart_p) = { "oscclk", "dout_shared0_div4",
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"dout_shared1_div4", "oscclk" };
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PNAME(mout_peri_ip_p) = { "oscclk", "dout_shared0_div4",
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"dout_shared1_div4", "oscclk" };
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/* List of parent clocks for Muxes in CMU_TOP: for CMU_DPU */
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PNAME(mout_dpu_p) = { "dout_shared0_div3", "dout_shared1_div3",
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"dout_shared0_div4", "dout_shared1_div4" };
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@ -599,7 +598,7 @@ static const unsigned long hsi_clk_regs[] __initconst = {
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CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_BUS_CLK_EARLY,
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};
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/* List of parent clocks for Muxes in CMU_PERI */
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/* List of parent clocks for Muxes in CMU_HSI */
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PNAME(mout_hsi_bus_user_p) = { "oscclk", "dout_hsi_bus" };
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PNAME(mout_hsi_mmc_card_user_p) = { "oscclk", "dout_hsi_mmc_card" };
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PNAME(mout_hsi_usb20drd_user_p) = { "oscclk", "dout_hsi_usb20drd" };
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@ -963,7 +962,7 @@ static const unsigned long dpu_clk_regs[] __initconst = {
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CLK_CON_GAT_GOUT_DPU_SYSREG_PCLK,
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};
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/* List of parent clocks for Muxes in CMU_CORE */
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/* List of parent clocks for Muxes in CMU_DPU */
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PNAME(mout_dpu_user_p) = { "oscclk", "dout_dpu" };
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static const struct samsung_mux_clock dpu_mux_clks[] __initconst = {
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