drm/amd/display: Prevent bandwidth overflow
[ Upstream commit 80089dd8410f356d5104496d5ab71a66a4f4646b ] [Why] At very high pixel clock, bandwidth calculation exceeds 32 bit size and overflow value. This causes the resulting selection of link rate to be inaccurate. [How] Change order of operation and use fixed point to deal with integer accuracy. Also address bug found when forcing link rate. Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -2909,8 +2909,12 @@ uint32_t dc_bandwidth_in_kbps_from_timing(
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#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
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if (timing->flags.DSC) {
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kbps = (timing->pix_clk_100hz * timing->dsc_cfg.bits_per_pixel);
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kbps = kbps / 160 + ((kbps % 160) ? 1 : 0);
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struct fixed31_32 link_bw_kbps;
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link_bw_kbps = dc_fixpt_from_int(timing->pix_clk_100hz);
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link_bw_kbps = dc_fixpt_div_int(link_bw_kbps, 160);
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link_bw_kbps = dc_fixpt_mul_int(link_bw_kbps, timing->dsc_cfg.bits_per_pixel);
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kbps = dc_fixpt_ceil(link_bw_kbps);
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return kbps;
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}
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#endif
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