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drm/vc4: dsi: Use snprintf for the PHY clocks instead of an array

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The DSI clocks setup function has been using an array to store the clock
name of either the DSI0 or DSI1 blocks, using the port ID to choose the
proper one.

Let's switch to an snprintf call to do the same thing and simplify the
array a bit.

Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-4-maxime@cerno.tech
This commit is contained in:
Maxime Ripard 2020-12-03 14:25:38 +01:00
parent e02d5c43f2
commit dc0bf36401
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GPG Key ID: E3EF0D6F671851C5
1 changed files with 9 additions and 8 deletions
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17
drivers/gpu/drm/vc4/vc4_dsi.c
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@ -1398,12 +1398,12 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi)
struct device *dev = &dsi->pdev->dev;
const char *parent_name = __clk_get_name(dsi->pll_phy_clock);
static const struct {
const char *dsi0_name, *dsi1_name;
const char *name;
int div;
} phy_clocks[] = {
{ "dsi0_byte", "dsi1_byte", 8 },
{ "dsi0_ddr2", "dsi1_ddr2", 4 },
{ "dsi0_ddr", "dsi1_ddr", 2 },
{ "byte", 8 },
{ "ddr2", 4 },
{ "ddr", 2 },
};
int i;
@ -1419,8 +1419,12 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi)
for (i = 0; i < ARRAY_SIZE(phy_clocks); i++) {
struct clk_fixed_factor *fix = &dsi->phy_clocks[i];
struct clk_init_data init;
char clk_name[16];
int ret;
snprintf(clk_name, sizeof(clk_name),
"dsi%u_%s", dsi->port, phy_clocks[i].name);
/* We just use core fixed factor clock ops for the PHY
* clocks. The clocks are actually gated by the
* PHY_AFEC0_DDRCLK_EN bits, which we should be
@ -1437,10 +1441,7 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi)
memset(&init, 0, sizeof(init));
init.parent_names = &parent_name;
init.num_parents = 1;
if (dsi->port == 1)
init.name = phy_clocks[i].dsi1_name;
else
init.name = phy_clocks[i].dsi0_name;
init.name = clk_name;
init.ops = &clk_fixed_factor_ops;
ret = devm_clk_hw_register(dev, &fix->hw);