spi: dw: Add support for Intel Thunder Bay SPI controller
Add support for Intel Thunder Bay SPI controller, which uses DesignWare DWC_ssi core and also add common init function for both Keem Bay and Thunder Bay. Signed-off-by: Nandhini Srikandan <nandhini.srikandan@intel.com> Acked-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20220713042223.1458-5-nandhini.srikandan@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -214,11 +214,10 @@ static int dw_spi_hssi_init(struct platform_device *pdev,
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return 0;
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}
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static int dw_spi_keembay_init(struct platform_device *pdev,
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struct dw_spi_mmio *dwsmmio)
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static int dw_spi_intel_init(struct platform_device *pdev,
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struct dw_spi_mmio *dwsmmio)
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{
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dwsmmio->dws.ip = DW_HSSI_ID;
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dwsmmio->dws.caps = DW_SPI_CAP_KEEMBAY_MST;
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return 0;
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}
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@ -349,7 +348,8 @@ static const struct of_device_id dw_spi_mmio_of_match[] = {
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{ .compatible = "amazon,alpine-dw-apb-ssi", .data = dw_spi_alpine_init},
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{ .compatible = "renesas,rzn1-spi", .data = dw_spi_pssi_init},
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{ .compatible = "snps,dwc-ssi-1.01a", .data = dw_spi_hssi_init},
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{ .compatible = "intel,keembay-ssi", .data = dw_spi_keembay_init},
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{ .compatible = "intel,keembay-ssi", .data = dw_spi_intel_init},
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{ .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init},
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{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
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{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},
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{ /* end of table */}
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@ -31,8 +31,7 @@
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/* DW SPI controller capabilities */
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#define DW_SPI_CAP_CS_OVERRIDE BIT(0)
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#define DW_SPI_CAP_KEEMBAY_MST BIT(1)
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#define DW_SPI_CAP_DFS32 BIT(2)
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#define DW_SPI_CAP_DFS32 BIT(1)
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/* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */
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#define DW_SPI_CTRLR0 0x00
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