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spi: stm32h7: don't wait for EOT and flush fifo on disable

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In nominal cases, disable is called as part of the unprepare_message,
after receiving a EOT and after receiving all data so it doesn't
make sense to check for EOT and empty the FIFO.
Moreover, at the end of the disable, the SPI is disable (SPE) leading
to clear of all internal FIFO, leaving the IP in a known status.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-7-git-send-email-alain.volmat@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Alain Volmat 2021-07-07 10:27:05 +02:00 committed by Mark Brown
parent d87a5d64b5
commit dc6620c313
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GPG Key ID: 24D68B725D5487D0
1 changed files with 2 additions and 22 deletions
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24
drivers/spi/spi-stm32.c
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@ -677,13 +677,12 @@ static void stm32f4_spi_disable(struct stm32_spi *spi)
* stm32h7_spi_disable - Disable SPI controller * stm32h7_spi_disable - Disable SPI controller
* @spi: pointer to the spi controller data structure * @spi: pointer to the spi controller data structure
* *
* RX-Fifo is flushed when SPI controller is disabled. To prevent any data * RX-Fifo is flushed when SPI controller is disabled.
* loss, use stm32_spi_read_rxfifo to read the remaining bytes in RX-Fifo.
*/ */
static void stm32h7_spi_disable(struct stm32_spi *spi) static void stm32h7_spi_disable(struct stm32_spi *spi)
{ {
unsigned long flags; unsigned long flags;
u32 cr1, sr; u32 cr1;
dev_dbg(spi->dev, "disable controller\n"); dev_dbg(spi->dev, "disable controller\n");
@ -696,25 +695,6 @@ static void stm32h7_spi_disable(struct stm32_spi *spi)
return; return;
} }
/* Wait on EOT or suspend the flow */
if (readl_relaxed_poll_timeout_atomic(spi->base + STM32H7_SPI_SR,
sr, !(sr & STM32H7_SPI_SR_EOT),
10, 100000) < 0) {
if (cr1 & STM32H7_SPI_CR1_CSTART) {
writel_relaxed(cr1 | STM32H7_SPI_CR1_CSUSP,
spi->base + STM32H7_SPI_CR1);
if (readl_relaxed_poll_timeout_atomic(
spi->base + STM32H7_SPI_SR,
sr, !(sr & STM32H7_SPI_SR_SUSP),
10, 100000) < 0)
dev_warn(spi->dev,
"Suspend request timeout\n");
}
}
if (!spi->cur_usedma && spi->rx_buf && (spi->rx_len > 0))
stm32h7_spi_read_rxfifo(spi);
if (spi->cur_usedma && spi->dma_tx) if (spi->cur_usedma && spi->dma_tx)
dmaengine_terminate_all(spi->dma_tx); dmaengine_terminate_all(spi->dma_tx);
if (spi->cur_usedma && spi->dma_rx) if (spi->cur_usedma && spi->dma_rx)