sata_dwc_460ex: device tree may specify dma_channel
Only channel 0 is currently support and the driver code is fixed on channel 0. This patch lets device node specifying dma-channel in case it is not 0. If no dma-channel property is specified, channel 0 is used as default. Signed-off-by: Thang Q. Nguyen <tqnguyen@apm.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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48
drivers/ata/sata_dwc_460ex.c
Normal file → Executable file
48
drivers/ata/sata_dwc_460ex.c
Normal file → Executable file
@ -158,6 +158,7 @@ enum {
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/* Assign HW handshaking interface (x) to destination / source peripheral */
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#define DMA_CFG_HW_HS_DEST(int_num) (((int_num) & 0xF) << 11)
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#define DMA_CFG_HW_HS_SRC(int_num) (((int_num) & 0xF) << 7)
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#define DMA_CFG_HW_CH_PRIOR(int_num) (((int_num) & 0xF) << 5)
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#define DMA_LLP_LMS(addr, master) (((addr) & 0xfffffffc) | (master))
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/*
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@ -318,6 +319,7 @@ struct sata_dwc_host_priv {
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u32 dma_interrupt_count;
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struct ahb_dma_regs *sata_dma_regs;
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struct device *dwc_dev;
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int dma_channel;
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};
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struct sata_dwc_host_priv host_pvt;
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/*
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@ -437,15 +439,12 @@ static void clear_chan_interrupts(int c)
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*/
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static int dma_request_channel(void)
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{
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int i;
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for (i = 0; i < DMA_NUM_CHANS; i++) {
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if (!(in_le32(&(host_pvt.sata_dma_regs->dma_chan_en.low)) &\
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DMA_CHANNEL(i)))
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return i;
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}
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dev_err(host_pvt.dwc_dev, "%s NO channel chan_en: 0x%08x\n", __func__,
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in_le32(&(host_pvt.sata_dma_regs->dma_chan_en.low)));
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/* Check if the channel is not currently in use */
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if (!(in_le32(&(host_pvt.sata_dma_regs->dma_chan_en.low)) &
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DMA_CHANNEL(host_pvt.dma_channel)))
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return host_pvt.dma_channel;
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dev_err(host_pvt.dwc_dev, "%s Channel %d is currently in use\n",
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__func__, host_pvt.dma_channel);
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return -1;
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}
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@ -481,7 +480,8 @@ static irqreturn_t dma_dwc_interrupt(int irq, void *hsdev_instance)
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dev_dbg(ap->dev, "eot=0x%08x err=0x%08x pending=%d active port=%d\n",
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tfr_reg, err_reg, hsdevp->dma_pending[tag], port);
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for (chan = 0; chan < DMA_NUM_CHANS; chan++) {
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chan = host_pvt.dma_channel;
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if (chan >= 0) {
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/* Check for end-of-transfer interrupt. */
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if (tfr_reg & DMA_CHANNEL(chan)) {
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/*
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@ -534,9 +534,9 @@ static irqreturn_t dma_dwc_interrupt(int irq, void *hsdev_instance)
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static int dma_request_interrupts(struct sata_dwc_device *hsdev, int irq)
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{
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int retval = 0;
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int chan;
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int chan = host_pvt.dma_channel;
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for (chan = 0; chan < DMA_NUM_CHANS; chan++) {
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if (chan >= 0) {
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/* Unmask error interrupt */
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out_le32(&(host_pvt.sata_dma_regs)->interrupt_mask.error.low,
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DMA_ENABLE_CHAN(chan));
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@ -575,7 +575,10 @@ static int map_sg_to_lli(struct scatterlist *sg, int num_elems,
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int fis_len = 0;
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dma_addr_t next_llp;
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int bl;
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int sms_val, dms_val;
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sms_val = 0;
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dms_val = 1 + host_pvt.dma_channel;
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dev_dbg(host_pvt.dwc_dev, "%s: sg=%p nelem=%d lli=%p dma_lli=0x%08x"
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" dmadr=0x%08x\n", __func__, sg, num_elems, lli, (u32)dma_lli,
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(u32)dmadr_addr);
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@ -635,8 +638,8 @@ static int map_sg_to_lli(struct scatterlist *sg, int num_elems,
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lli[idx].ctl.low = cpu_to_le32(
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DMA_CTL_TTFC(DMA_CTL_TTFC_P2M_DMAC) |
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DMA_CTL_SMS(0) |
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DMA_CTL_DMS(1) |
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DMA_CTL_SMS(sms_val) |
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DMA_CTL_DMS(dms_val) |
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DMA_CTL_SRC_MSIZE(bl) |
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DMA_CTL_DST_MSIZE(bl) |
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DMA_CTL_SINC_NOCHANGE |
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@ -651,8 +654,8 @@ static int map_sg_to_lli(struct scatterlist *sg, int num_elems,
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lli[idx].ctl.low = cpu_to_le32(
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DMA_CTL_TTFC(DMA_CTL_TTFC_M2P_PER) |
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DMA_CTL_SMS(1) |
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DMA_CTL_DMS(0) |
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DMA_CTL_SMS(dms_val) |
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DMA_CTL_DMS(sms_val) |
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DMA_CTL_SRC_MSIZE(bl) |
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DMA_CTL_DST_MSIZE(bl) |
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DMA_CTL_DINC_NOCHANGE |
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@ -744,8 +747,10 @@ static int dma_dwc_xfer_setup(struct scatterlist *sg, int num_elems,
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/* Program the CFG register. */
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out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.high),
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DMA_CFG_HW_HS_SRC(dma_ch) | DMA_CFG_HW_HS_DEST(dma_ch) |
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DMA_CFG_PROTCTL | DMA_CFG_FCMOD_REQ);
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out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.low), 0);
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out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.low),
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DMA_CFG_HW_CH_PRIOR(dma_ch));
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/* Program the address of the linked list */
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out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].llp.low),
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@ -1660,6 +1665,8 @@ static int sata_dwc_probe(struct platform_device *ofdev)
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struct ata_host *host;
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struct ata_port_info pi = sata_dwc_port_info[0];
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const struct ata_port_info *ppi[] = { &pi, NULL };
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struct device_node *np = ofdev->dev.of_node;
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u32 dma_chan;
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/* Allocate DWC SATA device */
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hsdev = kzalloc(sizeof(*hsdev), GFP_KERNEL);
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@ -1669,6 +1676,13 @@ static int sata_dwc_probe(struct platform_device *ofdev)
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goto error;
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}
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if (of_property_read_u32(np, "dma-channel", &dma_chan)) {
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dev_warn(&ofdev->dev, "no dma-channel property set."
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" Use channel 0\n");
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dma_chan = 0;
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}
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host_pvt.dma_channel = dma_chan;
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/* Ioremap SATA registers */
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base = of_iomap(ofdev->dev.of_node, 0);
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if (!base) {
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