x86: move apic declarations to mach_apic.h
take them out of the x86_64-specific asm/mach_apic.h Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
parent
ab68ed98f6
commit
dd46e3ca73
@ -34,7 +34,6 @@
|
||||
#include <asm/mpspec.h>
|
||||
#include <asm/hpet.h>
|
||||
#include <asm/pgalloc.h>
|
||||
#include <asm/mach_apic.h>
|
||||
#include <asm/nmi.h>
|
||||
#include <asm/idle.h>
|
||||
#include <asm/proto.h>
|
||||
@ -42,6 +41,7 @@
|
||||
#include <asm/apic.h>
|
||||
|
||||
#include <mach_ipi.h>
|
||||
#include <mach_apic.h>
|
||||
|
||||
int disable_apic_timer __cpuinitdata;
|
||||
static int apic_calibrate_pmtmr __initdata;
|
||||
|
@ -4,8 +4,8 @@
|
||||
#include <asm/io.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/apic.h>
|
||||
#include <asm/mach_apic.h>
|
||||
|
||||
#include <mach_apic.h>
|
||||
#include "cpu.h"
|
||||
|
||||
/*
|
||||
|
@ -43,7 +43,6 @@
|
||||
#include <asm/smp.h>
|
||||
#include <asm/desc.h>
|
||||
#include <asm/proto.h>
|
||||
#include <asm/mach_apic.h>
|
||||
#include <asm/acpi.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/nmi.h>
|
||||
@ -51,6 +50,7 @@
|
||||
#include <asm/hypertransport.h>
|
||||
|
||||
#include <mach_ipi.h>
|
||||
#include <mach_apic.h>
|
||||
|
||||
struct irq_cfg {
|
||||
cpumask_t domain;
|
||||
|
@ -58,7 +58,6 @@
|
||||
#include <asm/mmu_context.h>
|
||||
#include <asm/proto.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach_apic.h>
|
||||
#include <asm/numa.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/dmi.h>
|
||||
@ -67,6 +66,7 @@
|
||||
#include <asm/ds.h>
|
||||
#include <asm/topology.h>
|
||||
|
||||
#include <mach_apic.h>
|
||||
#ifdef CONFIG_PARAVIRT
|
||||
#include <asm/paravirt.h>
|
||||
#else
|
||||
|
@ -1,6 +1,8 @@
|
||||
#ifndef __ASM_MACH_APIC_H
|
||||
#define __ASM_MACH_APIC_H
|
||||
|
||||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
|
||||
#include <mach_apicdef.h>
|
||||
#include <asm/smp.h>
|
||||
|
||||
@ -14,24 +16,25 @@ static inline cpumask_t target_cpus(void)
|
||||
return cpumask_of_cpu(0);
|
||||
#endif
|
||||
}
|
||||
#define TARGET_CPUS (target_cpus())
|
||||
|
||||
#define NO_BALANCE_IRQ (0)
|
||||
#define esr_disable (0)
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
#include <asm/genapic.h>
|
||||
#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
|
||||
#define INT_DEST_MODE (genapic->int_dest_mode)
|
||||
#define TARGET_CPUS (genapic->target_cpus())
|
||||
#define apic_id_registered (genapic->apic_id_registered)
|
||||
#define init_apic_ldr (genapic->init_apic_ldr)
|
||||
#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
|
||||
#define phys_pkg_id (genapic->phys_pkg_id)
|
||||
#define vector_allocation_domain (genapic->vector_allocation_domain)
|
||||
extern void setup_apic_routing(void);
|
||||
#else
|
||||
#define INT_DELIVERY_MODE dest_LowestPrio
|
||||
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
|
||||
|
||||
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
|
||||
{
|
||||
return physid_isset(apicid, bitmap);
|
||||
}
|
||||
|
||||
static inline unsigned long check_apicid_present(int bit)
|
||||
{
|
||||
return physid_isset(bit, phys_cpu_present_map);
|
||||
}
|
||||
|
||||
#define TARGET_CPUS (target_cpus())
|
||||
/*
|
||||
* Set up the logical destination ID.
|
||||
*
|
||||
@ -49,33 +52,53 @@ static inline void init_apic_ldr(void)
|
||||
apic_write_around(APIC_LDR, val);
|
||||
}
|
||||
|
||||
static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
|
||||
static inline int apic_id_registered(void)
|
||||
{
|
||||
return phys_map;
|
||||
return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
|
||||
}
|
||||
|
||||
static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
|
||||
{
|
||||
return cpus_addr(cpumask)[0];
|
||||
}
|
||||
|
||||
static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
|
||||
{
|
||||
return cpuid_apic >> index_msb;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
extern void setup_apic_routing(void);
|
||||
#else
|
||||
static inline void setup_apic_routing(void)
|
||||
{
|
||||
printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
|
||||
"Flat", nr_ioapics);
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline int multi_timer_check(int apic, int irq)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
static inline int apicid_to_node(int logical_apicid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
|
||||
{
|
||||
return physid_isset(apicid, bitmap);
|
||||
}
|
||||
|
||||
static inline unsigned long check_apicid_present(int bit)
|
||||
{
|
||||
return physid_isset(bit, phys_cpu_present_map);
|
||||
}
|
||||
|
||||
static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
|
||||
{
|
||||
return phys_map;
|
||||
}
|
||||
|
||||
static inline int multi_timer_check(int apic, int irq)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Mapping from cpu number to logical apicid */
|
||||
static inline int cpu_to_logical_apicid(int cpu)
|
||||
{
|
||||
@ -109,23 +132,9 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
|
||||
return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
|
||||
}
|
||||
|
||||
static inline int apic_id_registered(void)
|
||||
{
|
||||
return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
|
||||
}
|
||||
|
||||
static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
|
||||
{
|
||||
return cpus_addr(cpumask)[0];
|
||||
}
|
||||
|
||||
static inline void enable_apic_mode(void)
|
||||
{
|
||||
}
|
||||
|
||||
static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
|
||||
{
|
||||
return cpuid_apic >> index_msb;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_X86_LOCAL_APIC */
|
||||
#endif /* __ASM_MACH_APIC_H */
|
||||
|
@ -1,26 +0,0 @@
|
||||
#ifndef __ASM_MACH_APIC_H
|
||||
#define __ASM_MACH_APIC_H
|
||||
|
||||
/*
|
||||
* Copyright 2004 James Cleverdon, IBM.
|
||||
* Subject to the GNU Public License, v.2
|
||||
*
|
||||
* Generic APIC sub-arch defines.
|
||||
*
|
||||
* Hacked for x86-64 by James Cleverdon from i386 architecture code by
|
||||
* Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
|
||||
* James Cleverdon.
|
||||
*/
|
||||
|
||||
#include <asm/genapic.h>
|
||||
|
||||
#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
|
||||
#define INT_DEST_MODE (genapic->int_dest_mode)
|
||||
#define TARGET_CPUS (genapic->target_cpus())
|
||||
#define vector_allocation_domain (genapic->vector_allocation_domain)
|
||||
#define apic_id_registered (genapic->apic_id_registered)
|
||||
#define init_apic_ldr (genapic->init_apic_ldr)
|
||||
#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
|
||||
#define phys_pkg_id (genapic->phys_pkg_id)
|
||||
|
||||
#endif /* __ASM_MACH_APIC_H */
|
Loading…
Reference in New Issue
Block a user