spi: mediatek: Prevent overflows in FIFO transfers
In the case where transfer length is not a multiple of 4, KASAN reports 2 out-of-bounds memory accesses: - mtk_spi_interrupt: ioread32_rep writes past the end of trans->rx_buf. - mtk_spi_fifo_transfer: iowrite32_rep reads past the end of xfer->tx_buf. Fix this by using memcpy on the remainder of the bytes. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -323,7 +323,8 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
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struct spi_device *spi,
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struct spi_transfer *xfer)
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{
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int cnt;
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int cnt, remainder;
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u32 reg_val;
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struct mtk_spi *mdata = spi_master_get_devdata(master);
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mdata->cur_transfer = xfer;
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@ -331,12 +332,16 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
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mtk_spi_prepare_transfer(master, xfer);
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mtk_spi_setup_packet(master);
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if (xfer->len % 4)
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cnt = xfer->len / 4 + 1;
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else
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cnt = xfer->len / 4;
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cnt = xfer->len / 4;
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iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
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remainder = xfer->len % 4;
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if (remainder > 0) {
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reg_val = 0;
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memcpy(®_val, xfer->tx_buf + (cnt * 4), remainder);
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writel(reg_val, mdata->base + SPI_TX_DATA_REG);
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}
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mtk_spi_enable_transfer(master);
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return 1;
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@ -418,7 +423,7 @@ static int mtk_spi_setup(struct spi_device *spi)
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static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
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{
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u32 cmd, reg_val, cnt;
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u32 cmd, reg_val, cnt, remainder;
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struct spi_master *master = dev_id;
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struct mtk_spi *mdata = spi_master_get_devdata(master);
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struct spi_transfer *trans = mdata->cur_transfer;
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@ -431,12 +436,15 @@ static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
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if (!master->can_dma(master, master->cur_msg->spi, trans)) {
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if (trans->rx_buf) {
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if (mdata->xfer_len % 4)
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cnt = mdata->xfer_len / 4 + 1;
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else
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cnt = mdata->xfer_len / 4;
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cnt = mdata->xfer_len / 4;
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ioread32_rep(mdata->base + SPI_RX_DATA_REG,
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trans->rx_buf, cnt);
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remainder = mdata->xfer_len % 4;
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if (remainder > 0) {
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reg_val = readl(mdata->base + SPI_RX_DATA_REG);
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memcpy(trans->rx_buf + (cnt * 4),
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®_val, remainder);
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}
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}
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spi_finalize_current_transfer(master);
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return IRQ_HANDLED;
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