bpf: Document new atomic instructions
Document new atomic instructions. Signed-off-by: Brendan Jackman <jackmanb@google.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Acked-by: Yonghong Song <yhs@fb.com> Link: https://lore.kernel.org/bpf/20210114181751.768687-12-jackmanb@google.com
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@ -1053,8 +1053,39 @@ encoding.
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.imm = BPF_ADD, .code = BPF_ATOMIC | BPF_W | BPF_STX: lock xadd *(u32 *)(dst_reg + off16) += src_reg
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.imm = BPF_ADD, .code = BPF_ATOMIC | BPF_DW | BPF_STX: lock xadd *(u64 *)(dst_reg + off16) += src_reg
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The basic atomic operations supported are:
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BPF_ADD
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BPF_AND
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BPF_OR
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BPF_XOR
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Each having equivalent semantics with the ``BPF_ADD`` example, that is: the
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memory location addresed by ``dst_reg + off`` is atomically modified, with
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``src_reg`` as the other operand. If the ``BPF_FETCH`` flag is set in the
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immediate, then these operations also overwrite ``src_reg`` with the
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value that was in memory before it was modified.
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The more special operations are:
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BPF_XCHG
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This atomically exchanges ``src_reg`` with the value addressed by ``dst_reg +
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off``.
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BPF_CMPXCHG
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This atomically compares the value addressed by ``dst_reg + off`` with
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``R0``. If they match it is replaced with ``src_reg``, The value that was there
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before is loaded back to ``R0``.
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Note that 1 and 2 byte atomic operations are not supported.
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Except ``BPF_ADD`` _without_ ``BPF_FETCH`` (for legacy reasons), all 4 byte
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atomic operations require alu32 mode. Clang enables this mode by default in
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architecture v3 (``-mcpu=v3``). For older versions it can be enabled with
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``-Xclang -target-feature -Xclang +alu32``.
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You may encounter BPF_XADD - this is a legacy name for BPF_ATOMIC, referring to
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the exclusive-add operation encoded when the immediate field is zero.
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