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clk: renesas: r8a77965: Add 3DGE and ZG support

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The 3DGE and ZG clocks are necessary to support the 3D graphics.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1767d01cfffd7490861f2cf6ad6c0df100916907.1689599217.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2023-07-17 15:11:22 +02:00
parent fd177b9ac5
commit dec57795ef
1 changed files with 2 additions and 0 deletions
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2
drivers/clk/renesas/r8a77965-cpg-mssr.c
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@ -76,6 +76,7 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
/* Core Clock Outputs */
DEF_GEN3_Z("z", R8A77965_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8),
DEF_GEN3_Z("zg", R8A77965_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24),
DEF_FIXED("ztr", R8A77965_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
DEF_FIXED("ztrd2", R8A77965_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
DEF_FIXED("zt", R8A77965_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
@ -125,6 +126,7 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
};
static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
DEF_MOD("3dge", 112, R8A77965_CLK_ZG),
DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1),
DEF_MOD("tmu4", 121, R8A77965_CLK_S0D6),
DEF_MOD("tmu3", 122, R8A77965_CLK_S3D2),