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arm64: dts: qcom: sc7280: Add CDSP node

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Add the node for the ADSP found on the SC7280 SoC, using standard
Qualcomm firmware.

Remove the reserved-memory node from sc7280-chrome-common since CDSP is
currently not used there.

Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-9-6aa394d33edf@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Luca Weiss 2023-12-08 16:08:05 +01:00 committed by Bjorn Andersson
parent 3658e411ef
commit df62402e5f
4 changed files with 151 additions and 0 deletions
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1
arch/arm64/boot/dts/qcom/qcm6490-idp.dts
View File

@ -14,6 +14,7 @@
/delete-node/ &ipa_fw_mem;
/delete-node/ &rmtfs_mem;
/delete-node/ &adsp_mem;
/delete-node/ &cdsp_mem;
/delete-node/ &video_mem;
/delete-node/ &wlan_ce_mem;
/delete-node/ &xbl_mem;

1
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
View File

@ -20,6 +20,7 @@
/delete-node/ &remoteproc_mpss;
/delete-node/ &rmtfs_mem;
/delete-node/ &adsp_mem;
/delete-node/ &cdsp_mem;
/delete-node/ &video_mem;
/delete-node/ &wlan_ce_mem;
/delete-node/ &xbl_mem;

6
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
View File

@ -17,6 +17,7 @@
* required by the setup for Chrome boards.
*/
/delete-node/ &cdsp_mem;
/delete-node/ &gpu_zap_mem;
/delete-node/ &gpu_zap_shader;
/delete-node/ &hyp_mem;
@ -91,6 +92,11 @@
};
};
/* Currently not used */
&remoteproc_cdsp {
/delete-property/ memory-region;
};
&remoteproc_wpss {
compatible = "qcom,sc7280-wpss-pil";
clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,

143
arch/arm64/boot/dts/qcom/sc7280.dtsi
View File

@ -153,6 +153,11 @@
no-map;
};
cdsp_mem: cdsp@88f00000 {
reg = <0x0 0x88f00000 0x0 0x1e00000>;
no-map;
};
ipa_fw_mem: memory@8b700000 {
reg = <0 0x8b700000 0 0x10000>;
no-map;
@ -3835,6 +3840,144 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
remoteproc_cdsp: remoteproc@a300000 {
compatible = "qcom,sc7280-cdsp-pas";
reg = <0 0x0a300000 0 0x10000>;
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
<&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready", "handover",
"stop-ack", "shutdown-ack";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
power-domains = <&rpmhpd SC7280_CX>,
<&rpmhpd SC7280_MX>;
power-domain-names = "cx", "mx";
interconnects = <&nsp_noc MASTER_CDSP_PROC 0 &mc_virt SLAVE_EBI1 0>;
memory-region = <&cdsp_mem>;
qcom,qmp = <&aoss_qmp>;
qcom,smem-states = <&cdsp_smp2p_out 0>;
qcom,smem-state-names = "stop";
status = "disabled";
glink-edge {
interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
IPCC_MPROC_SIGNAL_GLINK_QMP
IRQ_TYPE_EDGE_RISING>;
mboxes = <&ipcc IPCC_CLIENT_CDSP
IPCC_MPROC_SIGNAL_GLINK_QMP>;
label = "cdsp";
qcom,remote-pid = <5>;
fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "cdsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x11a1 0x0420>,
<&apps_smmu 0x1181 0x0420>;
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x11a2 0x0420>,
<&apps_smmu 0x1182 0x0420>;
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x11a3 0x0420>,
<&apps_smmu 0x1183 0x0420>;
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x11a4 0x0420>,
<&apps_smmu 0x1184 0x0420>;
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x11a5 0x0420>,
<&apps_smmu 0x1185 0x0420>;
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x11a6 0x0420>,
<&apps_smmu 0x1186 0x0420>;
};
compute-cb@7 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x11a7 0x0420>,
<&apps_smmu 0x1187 0x0420>;
};
compute-cb@8 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x11a8 0x0420>,
<&apps_smmu 0x1188 0x0420>;
};
/* note: secure cb9 in downstream */
compute-cb@11 {
compatible = "qcom,fastrpc-compute-cb";
reg = <11>;
iommus = <&apps_smmu 0x11ab 0x0420>,
<&apps_smmu 0x118b 0x0420>;
};
compute-cb@12 {
compatible = "qcom,fastrpc-compute-cb";
reg = <12>;
iommus = <&apps_smmu 0x11ac 0x0420>,
<&apps_smmu 0x118c 0x0420>;
};
compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb";
reg = <13>;
iommus = <&apps_smmu 0x11ad 0x0420>,
<&apps_smmu 0x118d 0x0420>;
};
compute-cb@14 {
compatible = "qcom,fastrpc-compute-cb";
reg = <14>;
iommus = <&apps_smmu 0x11ae 0x0420>,
<&apps_smmu 0x118e 0x0420>;
};
};
};
};
usb_1: usb@a6f8800 {
compatible = "qcom,sc7280-dwc3", "qcom,dwc3";
reg = <0 0x0a6f8800 0 0x400>;