media: dt-bindings: media: venus: Convert msm8996 to DT schema
Convert qcom,msm8996-venus Venus binding to DT schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml
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Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Qualcomm Venus video encode and decode accelerators
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maintainers:
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- Stanimir Varbanov <stanimir.varbanov@linaro.org>
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description: |
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The Venus IP is a video encode and decode accelerator present
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on Qualcomm platforms
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properties:
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compatible:
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const: qcom,msm8996-venus
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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clocks:
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maxItems: 4
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clock-names:
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items:
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- const: core
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- const: iface
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- const: bus
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- const: mbus
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iommus:
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maxItems: 20
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memory-region:
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maxItems: 1
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video-decoder:
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type: object
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properties:
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compatible:
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const: venus-decoder
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: core
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power-domains:
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maxItems: 1
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required:
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- compatible
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- clocks
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- clock-names
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- power-domains
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additionalProperties: false
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video-encoder:
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type: object
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properties:
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compatible:
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const: venus-encoder
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: core
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power-domains:
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maxItems: 1
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required:
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- compatible
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- clocks
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- clock-names
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- power-domains
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additionalProperties: false
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video-firmware:
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type: object
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description: |
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Firmware subnode is needed when the platform does not
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have TrustZone.
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properties:
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iommus:
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maxItems: 1
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required:
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- iommus
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required:
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- compatible
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- reg
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- interrupts
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- power-domains
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- clocks
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- clock-names
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- iommus
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- memory-region
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- video-decoder
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- video-encoder
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
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video-codec@c00000 {
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compatible = "qcom,msm8996-venus";
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reg = <0x00c00000 0xff000>;
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interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mmcc VIDEO_CORE_CLK>,
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<&mmcc VIDEO_AHB_CLK>,
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<&mmcc VIDEO_AXI_CLK>,
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<&mmcc VIDEO_MAXI_CLK>;
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clock-names = "core", "iface", "bus", "mbus";
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power-domains = <&mmcc VENUS_GDSC>;
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iommus = <&venus_smmu 0x00>,
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<&venus_smmu 0x01>,
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<&venus_smmu 0x0a>,
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<&venus_smmu 0x07>,
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<&venus_smmu 0x0e>,
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<&venus_smmu 0x0f>,
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<&venus_smmu 0x08>,
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<&venus_smmu 0x09>,
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<&venus_smmu 0x0b>,
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<&venus_smmu 0x0c>,
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<&venus_smmu 0x0d>,
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<&venus_smmu 0x10>,
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<&venus_smmu 0x11>,
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<&venus_smmu 0x21>,
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<&venus_smmu 0x28>,
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<&venus_smmu 0x29>,
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<&venus_smmu 0x2b>,
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<&venus_smmu 0x2c>,
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<&venus_smmu 0x2d>,
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<&venus_smmu 0x31>;
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memory-region = <&venus_mem>;
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video-decoder {
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compatible = "venus-decoder";
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clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
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clock-names = "core";
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power-domains = <&mmcc VENUS_CORE0_GDSC>;
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};
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video-encoder {
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compatible = "venus-encoder";
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clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
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clock-names = "core";
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power-domains = <&mmcc VENUS_CORE1_GDSC>;
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};
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};
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