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iio: amplifiers: ad8366: Fix alignment for DMA safety

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[ Upstream commit 026bffa458d029a5f15ac3f82a9bb0f64aca403d ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: e71d42e03c60 ("iio: amplifiers: New driver for AD8366 Dual-Digital Variable Gain Amplifier")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-42-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Jonathan Cameron 2022-05-08 18:56:21 +01:00 committed by Greg Kroah-Hartman
parent 5e6b52de1d
commit dfa45bd7e0
1 changed files with 2 additions and 2 deletions
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4
drivers/iio/amplifiers/ad8366.c
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@ -45,10 +45,10 @@ struct ad8366_state {
enum ad8366_type type;
struct ad8366_info *info;
/*
* DMA (thus cache coherency maintenance) requires the
* DMA (thus cache coherency maintenance) may require the
* transfer buffers to live in their own cache lines.
*/
unsigned char data[2] ____cacheline_aligned;
unsigned char data[2] __aligned(IIO_DMA_MINALIGN);
};
static struct ad8366_info ad8366_infos[] = {