ASoC: tas2562: Fix TDM_CFG0_SAMPRATE values
[ Upstream commit 8bef925e37bdc9b6554b85eda16ced9a8e3c135f ] TAS2562_TDM_CFG0_SAMPRATE_MASK starts at bit 1, not 0. So all values need to be left shifted by 1. Signed-off-by: Richard Weinberger <richard@nod.at> Link: https://lore.kernel.org/r/20210530203446.19022-1-richard@nod.at Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -57,13 +57,13 @@
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#define TAS2562_TDM_CFG0_RAMPRATE_MASK BIT(5)
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#define TAS2562_TDM_CFG0_RAMPRATE_44_1 BIT(5)
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#define TAS2562_TDM_CFG0_SAMPRATE_MASK GENMASK(3, 1)
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#define TAS2562_TDM_CFG0_SAMPRATE_7305_8KHZ 0x0
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#define TAS2562_TDM_CFG0_SAMPRATE_14_7_16KHZ 0x1
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#define TAS2562_TDM_CFG0_SAMPRATE_22_05_24KHZ 0x2
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#define TAS2562_TDM_CFG0_SAMPRATE_29_4_32KHZ 0x3
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#define TAS2562_TDM_CFG0_SAMPRATE_44_1_48KHZ 0x4
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#define TAS2562_TDM_CFG0_SAMPRATE_88_2_96KHZ 0x5
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#define TAS2562_TDM_CFG0_SAMPRATE_176_4_192KHZ 0x6
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#define TAS2562_TDM_CFG0_SAMPRATE_7305_8KHZ (0x0 << 1)
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#define TAS2562_TDM_CFG0_SAMPRATE_14_7_16KHZ (0x1 << 1)
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#define TAS2562_TDM_CFG0_SAMPRATE_22_05_24KHZ (0x2 << 1)
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#define TAS2562_TDM_CFG0_SAMPRATE_29_4_32KHZ (0x3 << 1)
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#define TAS2562_TDM_CFG0_SAMPRATE_44_1_48KHZ (0x4 << 1)
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#define TAS2562_TDM_CFG0_SAMPRATE_88_2_96KHZ (0x5 << 1)
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#define TAS2562_TDM_CFG0_SAMPRATE_176_4_192KHZ (0x6 << 1)
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#define TAS2562_TDM_CFG2_RIGHT_JUSTIFY BIT(6)
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