From 3589e6d9f6e929339692585d1169f149e789d229 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 20 Oct 2023 15:57:05 +0100 Subject: [PATCH 1/5] dt-bindings: arm: sunxi: add Orange Pi Zero 2W The Orange Pi Zero 2W is a small board with an Allwinner H618 SoC. Add the compatible string to the binding documents. Signed-off-by: Andre Przywara Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231020145706.705420-2-andre.przywara@arm.com Signed-off-by: Jernej Skrabec --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 11c5ce941dd7..6f481e8bb4bf 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -1013,6 +1013,11 @@ properties: - const: xunlong,orangepi-zero2 - const: allwinner,sun50i-h616 + - description: Xunlong OrangePi Zero 2W + items: + - const: xunlong,orangepi-zero2w + - const: allwinner,sun50i-h618 + - description: Xunlong OrangePi Zero 3 items: - const: xunlong,orangepi-zero3 From c505ee1eae18fb7b32d792e4470d5ef1934376bd Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 20 Oct 2023 15:57:06 +0100 Subject: [PATCH 2/5] arm64: dts: allwinner: h616: add Orange Pi Zero 2W support The Orange Pi Zero 2W is a board based on the Allwinner H618 SoC. It uses the RaspberryPi Zero form factor, with an optional expansion board, connected via an FPC connector, to provide more connectors. The base board features: - Allwinner H618 SoC (quad Cortex-A53 cores, with 1MB L2 cache) - 1, 2 or 4GB of LPDDR4 DRAM - SD card socket - two USB-C sockets, one UFP, one DFP - HDMI connector - (yet unsupported) WiFi module - 16 MiB SPI flash - power supply via the UFP USB-C port The FPC connector provides access to two more USB host ports, Fast Ethernet, some GPIOs, Audio Line out and the IR receiver pin. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec Link: https://lore.kernel.org/r/20231020145706.705420-3-andre.przywara@arm.com Signed-off-by: Jernej Skrabec --- .../allwinner/sun50i-h618-orangepi-zero2w.dts | 176 ++++++++++++++++++ 1 file changed, 176 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts new file mode 100644 index 000000000000..21ca1977055d --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts @@ -0,0 +1,176 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 Arm Ltd. + */ + +/dts-v1/; + +#include "sun50i-h616.dtsi" + +#include +#include +#include + +/ { + model = "OrangePi Zero 2W"; + compatible = "xunlong,orangepi-zero2w", "allwinner,sun50i-h618"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ + }; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the USB-C socket */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_vcc3v3: vcc3v3 { + /* SY8089 DC/DC converter */ + compatible = "regulator-fixed"; + regulator-name = "vcc-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <®_vcc5v>; + regulator-always-on; + }; +}; + +&ehci1 { + status = "okay"; +}; + +/* USB 2 & 3 are on the FPC connector (or the exansion board) */ + +&mmc0 { + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + vmmc-supply = <®_vcc3v3>; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + vcc-pc-supply = <®_dldo1>; + vcc-pf-supply = <®_dldo1>; /* internally via VCC-IO */ + vcc-pg-supply = <®_aldo1>; + vcc-ph-supply = <®_dldo1>; /* internally via VCC-IO */ + vcc-pi-supply = <®_dldo1>; +}; + +&r_i2c { + status = "okay"; + + axp313: pmic@36 { + compatible = "x-powers,axp313a"; + reg = <0x36>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&pio>; + interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */ + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + + regulators { + /* Supplies VCC-PLL and DRAM */ + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8"; + }; + + /* Supplies VCC-IO, so needs to be always on. */ + reg_dldo1: dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3"; + }; + + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <990000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-dram"; + }; + }; + }; +}; + +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +&usbotg { + /* + * PHY0 pins are connected to a USB-C socket, but a role switch + * is not implemented: both CC pins are pulled to GND. + * The VBUS pins power the device, so a fixed peripheral mode + * is the best choice. + * The board can be powered via GPIOs, in this case port0 *can* + * act as a host (with a cable/adapter ignoring CC), as VBUS is + * then provided by the GPIOs. Any user of this setup would + * need to adjust the DT accordingly: dr_mode set to "host", + * enabling OHCI0 and EHCI0. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_vcc5v>; + status = "okay"; +}; From a0b4600c777d6ab74a3c2857026a0a3c3e1f7100 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Thu, 14 Dec 2023 01:53:10 +0000 Subject: [PATCH 3/5] dt-bindings: vendor-prefixes: add Transpeed This is a name used by some Chinese TV boxes, add it to the bindings. Signed-off-by: Andre Przywara Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231214015312.17363-2-andre.przywara@arm.com Signed-off-by: Jernej Skrabec --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 309b94c328c8..c545c63b316d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1434,6 +1434,8 @@ patternProperties: description: TPO "^tq,.*": description: TQ-Systems GmbH + "^transpeed,.*": + description: Transpeed "^traverse,.*": description: Traverse Technologies Australia Pty Ltd "^tronfy,.*": From 3094e7282f6bae36520ca2807303adea7ae5ab50 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Thu, 14 Dec 2023 01:53:11 +0000 Subject: [PATCH 4/5] dt-bindings: arm: sunxi: document Transpeed 8K618-T board name The Transpeed 8K618-T TV box is a Chinese Android TV box, using the Allwinner H618 SoC. Add the board/SoC compatible string pair to the list of known boards. Signed-off-by: Andre Przywara Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231214015312.17363-3-andre.przywara@arm.com Signed-off-by: Jernej Skrabec --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 6f481e8bb4bf..a9d8e85565b8 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -868,6 +868,11 @@ properties: - const: topwise,a721 - const: allwinner,sun4i-a10 + - description: Transpeed 8K618-T + items: + - const: transpeed,8k618-t + - const: allwinner,sun50i-h618 + - description: Utoo P66 items: - const: utoo,p66 From 557e5347ba8bb050fec39c488486c4a948f2e4aa Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Thu, 14 Dec 2023 01:53:12 +0000 Subject: [PATCH 5/5] arm64: dts: allwinner: h618: add Transpeed 8K618-T TV box This is a Chinese TV box, probably very similar if not identical to various other cheap TV boxes with the same specs: - Allwinner H618 SoC (4 * Arm Cortex-A53 cores, 1MB L2 cache) - 2 or 4GiB DDR3L DRAM - 32, 64, or 128 GiB eMMC flash - AXP313a PMIC - 100 Mbit/s Ethernet (using yet unsupported internal PHY) - HDMI port - 2 * USB 2.0 ports - microSD card slot - 3.5mm A/V port - 7-segment display - 5V barrel plug power supply The PCB provides holes for soldering a UART header or cable, this is connected to the debug UART0. UART1 is used for the Bluetooth chip, although this isn't working yet. Signed-off-by: Andre Przywara Acked-by: Jernej Skrabec Link: https://lore.kernel.org/r/20231214015312.17363-4-andre.przywara@arm.com Signed-off-by: Jernej Skrabec --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../sun50i-h618-transpeed-8k618-t.dts | 161 ++++++++++++++++++ 2 files changed, 162 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index 3aca6787a167..91d505b385de 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -43,3 +43,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts new file mode 100644 index 000000000000..8ea1fd41aeba --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 Arm Ltd. + */ + +/dts-v1/; + +#include "sun50i-h616.dtsi" + +#include +#include + +/ { + model = "Transpeed 8K618-T"; + compatible = "transpeed,8k618-t", "allwinner,sun50i-h618"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the DC input */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_vcc3v3: vcc3v3 { + /* discrete 3.3V regulator */ + compatible = "regulator-fixed"; + regulator-name = "vcc-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&ir { + status = "okay"; +}; + +&mmc0 { + vmmc-supply = <®_dldo1>; + cd-gpios = <&pio 8 16 GPIO_ACTIVE_LOW>; /* PI16 */ + bus-width = <4>; + status = "okay"; +}; + +&mmc2 { + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_aldo1>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&r_i2c { + status = "okay"; + + axp313: pmic@36 { + compatible = "x-powers,axp313a"; + reg = <0x36>; + #interrupt-cells = <1>; + interrupt-controller; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + + regulators { + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-1v8-pll"; + }; + + reg_dldo1: dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3-io-mmc"; + }; + + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <990000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1360000>; + regulator-max-microvolt = <1360000>; + regulator-name = "vdd-dram"; + }; + }; + }; +}; + +&pio { + vcc-pc-supply = <®_aldo1>; + vcc-pg-supply = <®_dldo1>; + vcc-ph-supply = <®_dldo1>; + vcc-pi-supply = <®_dldo1>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; +}; + +&usbotg { + dr_mode = "host"; /* USB A type receptable */ + status = "okay"; +}; + +&usbphy { + status = "okay"; +};