powerpc/powernv: Fix indirect XSCOM unmangling
We need to unmangle the full address, not just the register number, and we also need to support the real indirect bit being set for in-kernel uses. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: <stable@vger.kernel.org> [v3.13]
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@ -71,11 +71,11 @@ static int opal_xscom_err_xlate(int64_t rc)
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}
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}
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static u64 opal_scom_unmangle(u64 reg)
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static u64 opal_scom_unmangle(u64 addr)
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{
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/*
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* XSCOM indirect addresses have the top bit set. Additionally
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* the reset of the top 3 nibbles is always 0.
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* the rest of the top 3 nibbles is always 0.
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*
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* Because the debugfs interface uses signed offsets and shifts
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* the address left by 3, we basically cannot use the top 4 bits
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@ -86,10 +86,13 @@ static u64 opal_scom_unmangle(u64 reg)
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* conversion here. To leave room for further xscom address
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* expansion, we only clear out the top byte
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*
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* For in-kernel use, we also support the real indirect bit, so
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* we test for any of the top 5 bits
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*
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*/
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if (reg & (1ull << 59))
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reg = (reg & ~(0xffull << 56)) | (1ull << 63);
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return reg;
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if (addr & (0x1full << 59))
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addr = (addr & ~(0xffull << 56)) | (1ull << 63);
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return addr;
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}
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static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
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@ -98,8 +101,8 @@ static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
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int64_t rc;
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__be64 v;
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reg = opal_scom_unmangle(reg);
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rc = opal_xscom_read(m->chip, m->addr + reg, (__be64 *)__pa(&v));
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reg = opal_scom_unmangle(m->addr + reg);
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rc = opal_xscom_read(m->chip, reg, (__be64 *)__pa(&v));
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*value = be64_to_cpu(v);
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return opal_xscom_err_xlate(rc);
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}
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@ -109,8 +112,8 @@ static int opal_scom_write(scom_map_t map, u64 reg, u64 value)
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struct opal_scom_map *m = map;
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int64_t rc;
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reg = opal_scom_unmangle(reg);
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rc = opal_xscom_write(m->chip, m->addr + reg, value);
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reg = opal_scom_unmangle(m->addr + reg);
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rc = opal_xscom_write(m->chip, reg, value);
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return opal_xscom_err_xlate(rc);
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}
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