rtw89: pci: add variant RPWM/CPWM to enter low power mode
RPWM/CPWM are registers that can set and check low power mode. Since chips use different address, add a field to access them in common flow. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220421120903.73715-3-pkshih@realtek.com
This commit is contained in:
parent
948e521c72
commit
e1757e8045
@ -1027,7 +1027,7 @@ static int rtw89_mac_check_cpwm_state(struct rtw89_dev *rtwdev,
|
||||
return 0;
|
||||
|
||||
rpwm_req_num = rtwdev->mac.rpwm_seq_num;
|
||||
cpwm_rsp_seq = rtw89_read16_mask(rtwdev, R_AX_CPWM,
|
||||
cpwm_rsp_seq = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr,
|
||||
PS_CPWM_RSP_SEQ_NUM);
|
||||
|
||||
if (rpwm_req_num != cpwm_rsp_seq)
|
||||
@ -1036,11 +1036,11 @@ static int rtw89_mac_check_cpwm_state(struct rtw89_dev *rtwdev,
|
||||
rtwdev->mac.cpwm_seq_num = (rtwdev->mac.cpwm_seq_num + 1) &
|
||||
CPWM_SEQ_NUM_MAX;
|
||||
|
||||
cpwm_seq = rtw89_read16_mask(rtwdev, R_AX_CPWM, PS_CPWM_SEQ_NUM);
|
||||
cpwm_seq = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, PS_CPWM_SEQ_NUM);
|
||||
if (cpwm_seq != rtwdev->mac.cpwm_seq_num)
|
||||
return -EPERM;
|
||||
|
||||
cpwm_status = rtw89_read16_mask(rtwdev, R_AX_CPWM, PS_CPWM_STATE);
|
||||
cpwm_status = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, PS_CPWM_STATE);
|
||||
if (cpwm_status != req_pwr_state)
|
||||
return -EPERM;
|
||||
|
||||
|
@ -3486,6 +3486,7 @@ int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
struct ieee80211_hw *hw;
|
||||
struct rtw89_dev *rtwdev;
|
||||
const struct rtw89_driver_info *info;
|
||||
const struct rtw89_pci_info *pci_info;
|
||||
int driver_data_size;
|
||||
int ret;
|
||||
|
||||
@ -3496,19 +3497,20 @@ int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
info = (const struct rtw89_driver_info *)id->driver_data;
|
||||
pci_info = info->bus.pci;
|
||||
|
||||
rtwdev = hw->priv;
|
||||
rtwdev->hw = hw;
|
||||
rtwdev->dev = &pdev->dev;
|
||||
rtwdev->hci.ops = &rtw89_pci_ops;
|
||||
rtwdev->hci.type = RTW89_HCI_TYPE_PCIE;
|
||||
rtwdev->hci.rpwm_addr = R_AX_PCIE_HRPWM;
|
||||
rtwdev->hci.cpwm_addr = R_AX_CPWM;
|
||||
|
||||
SET_IEEE80211_DEV(rtwdev->hw, &pdev->dev);
|
||||
|
||||
info = (const struct rtw89_driver_info *)id->driver_data;
|
||||
rtwdev->chip = info->chip;
|
||||
rtwdev->pci_info = info->bus.pci;
|
||||
rtwdev->hci.ops = &rtw89_pci_ops;
|
||||
rtwdev->hci.type = RTW89_HCI_TYPE_PCIE;
|
||||
rtwdev->hci.rpwm_addr = pci_info->rpwm_addr;
|
||||
rtwdev->hci.cpwm_addr = pci_info->cpwm_addr;
|
||||
|
||||
SET_IEEE80211_DEV(rtwdev->hw, &pdev->dev);
|
||||
|
||||
ret = rtw89_core_init(rtwdev);
|
||||
if (ret) {
|
||||
|
@ -481,6 +481,9 @@
|
||||
#define R_AX_PCIE_RX_PREF_ADV 0x13F4
|
||||
#define B_AX_RXDMA_PREF_ADV_EN BIT(0)
|
||||
|
||||
#define R_AX_PCIE_HRPWM_V1 0x30C0
|
||||
#define R_AX_PCIE_CRPWM 0x30C4
|
||||
|
||||
#define RTW89_PCI_TXBD_NUM_MAX 256
|
||||
#define RTW89_PCI_RXBD_NUM_MAX 256
|
||||
#define RTW89_PCI_TXWD_NUM_MAX 512
|
||||
@ -698,6 +701,8 @@ struct rtw89_pci_info {
|
||||
u32 dma_busy2_reg;
|
||||
u32 dma_busy3_reg;
|
||||
|
||||
u32 rpwm_addr;
|
||||
u32 cpwm_addr;
|
||||
const struct rtw89_pci_ch_dma_addr_set *dma_addr_set;
|
||||
|
||||
int (*ltr_set)(struct rtw89_dev *rtwdev, bool en);
|
||||
|
@ -6,6 +6,7 @@
|
||||
#include <linux/pci.h>
|
||||
|
||||
#include "pci.h"
|
||||
#include "reg.h"
|
||||
#include "rtw8852a.h"
|
||||
|
||||
static const struct rtw89_pci_info rtw8852a_pci_info = {
|
||||
@ -38,6 +39,8 @@ static const struct rtw89_pci_info rtw8852a_pci_info = {
|
||||
.dma_busy2_reg = R_AX_PCIE_DMA_BUSY2,
|
||||
.dma_busy3_reg = R_AX_PCIE_DMA_BUSY1,
|
||||
|
||||
.rpwm_addr = R_AX_PCIE_HRPWM,
|
||||
.cpwm_addr = R_AX_CPWM,
|
||||
.dma_addr_set = &rtw89_pci_ch_dma_addr_set,
|
||||
|
||||
.ltr_set = rtw89_pci_ltr_set,
|
||||
|
@ -39,6 +39,8 @@ static const struct rtw89_pci_info rtw8852c_pci_info = {
|
||||
.dma_busy2_reg = R_AX_HAXI_DMA_BUSY2,
|
||||
.dma_busy3_reg = R_AX_HAXI_DMA_BUSY3,
|
||||
|
||||
.rpwm_addr = R_AX_PCIE_HRPWM_V1,
|
||||
.cpwm_addr = R_AX_PCIE_CRPWM,
|
||||
.dma_addr_set = &rtw89_pci_ch_dma_addr_set_v1,
|
||||
|
||||
.ltr_set = rtw89_pci_ltr_set_v1,
|
||||
|
Loading…
x
Reference in New Issue
Block a user