iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arm64: dts: rockchip: Add DSI and DSI-DPHY nodes to rk356x

Browse Source 
This adds the DSI controller nodes and DSI-DPHY controller nodes to the
rk356x device tree.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220919164616.12492-4-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Chris Morgan 2022-09-19 11:46:16 -05:00 committed by Heiko Stuebner
parent d99efdaba9
commit e18d9b0930
1 changed files with 80 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

80
arch/arm64/boot/dts/rockchip/rk356x.dtsi
View File

@ -739,6 +739,62 @@
status = "disabled";
};
dsi0: dsi@fe060000 {
compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0x00 0xfe060000 0x00 0x10000>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "hclk";
clocks = <&cru PCLK_DSITX_0>, <&cru HCLK_VO>;
phy-names = "dphy";
phys = <&dsi_dphy0>;
power-domains = <&power RK3568_PD_VO>;
reset-names = "apb";
resets = <&cru SRST_P_DSITX_0>;
rockchip,grf = <&grf>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
dsi0_in: port@0 {
reg = <0>;
};
dsi0_out: port@1 {
reg = <1>;
};
};
};
dsi1: dsi@fe070000 {
compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0x0 0xfe070000 0x0 0x10000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "hclk";
clocks = <&cru PCLK_DSITX_1>, <&cru HCLK_VO>;
phy-names = "dphy";
phys = <&dsi_dphy1>;
power-domains = <&power RK3568_PD_VO>;
reset-names = "apb";
resets = <&cru SRST_P_DSITX_1>;
rockchip,grf = <&grf>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
dsi1_in: port@0 {
reg = <0>;
};
dsi1_out: port@1 {
reg = <1>;
};
};
};
hdmi: hdmi@fe0a0000 {
compatible = "rockchip,rk3568-dw-hdmi";
reg = <0x0 0xfe0a0000 0x0 0x20000>;
@ -1646,6 +1702,30 @@
status = "disabled";
};
dsi_dphy0: mipi-dphy@fe850000 {
compatible = "rockchip,rk3568-dsi-dphy";
reg = <0x0 0xfe850000 0x0 0x10000>;
clock-names = "ref", "pclk";
clocks = <&pmucru CLK_MIPIDSIPHY0_REF>, <&cru PCLK_MIPIDSIPHY0>;
#phy-cells = <0>;
power-domains = <&power RK3568_PD_VO>;
reset-names = "apb";
resets = <&cru SRST_P_MIPIDSIPHY0>;
status = "disabled";
};
dsi_dphy1: mipi-dphy@fe860000 {
compatible = "rockchip,rk3568-dsi-dphy";
reg = <0x0 0xfe860000 0x0 0x10000>;
clock-names = "ref", "pclk";
clocks = <&pmucru CLK_MIPIDSIPHY1_REF>, <&cru PCLK_MIPIDSIPHY1>;
#phy-cells = <0>;
power-domains = <&power RK3568_PD_VO>;
reset-names = "apb";
resets = <&cru SRST_P_MIPIDSIPHY1>;
status = "disabled";
};
usb2phy0: usb2phy@fe8a0000 {
compatible = "rockchip,rk3568-usb2phy";
reg = <0x0 0xfe8a0000 0x0 0x10000>;