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drm/i915/dp: Avoid forcing DSC BPC for MST case

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For MST the bpc is hardcoded to 8, and pipe bpp to 24.
So avoid forcing DSC bpc for MST case.

v2: Warn and ignore the debug flag than to bail out. (Jani)

v3: Fix dbg message to mention forced bpc instead of bpp.

v4: Fix checkpatch longline warning.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-9-ankit.k.nautiyal@intel.com
This commit is contained in:
Ankit Nautiyal 2023-08-17 19:54:49 +05:30
parent 90bba71a1a
commit e1a211e316
2 changed files with 12 additions and 7 deletions
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14
drivers/gpu/drm/i915/display/intel_dp.c
View File

@ -1697,14 +1697,14 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
return -EINVAL;
if (compute_pipe_bpp)
pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
else
pipe_bpp = pipe_config->pipe_bpp;
if (intel_dp->force_dsc_bpc) {
if (intel_dp->force_dsc_bpc && compute_pipe_bpp) {
pipe_bpp = intel_dp->force_dsc_bpc * 3;
drm_dbg_kms(&dev_priv->drm, "Input DSC BPP forced to %d", pipe_bpp);
drm_dbg_kms(&dev_priv->drm, "Input DSC BPC forced to %d\n",
intel_dp->force_dsc_bpc);
} else if (compute_pipe_bpp) {
pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
} else {
pipe_bpp = pipe_config->pipe_bpp;
}
/* Min Input BPC for ICL+ is 8 */

5
drivers/gpu/drm/i915/display/intel_dp_mst.c
View File

@ -361,6 +361,11 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
/* enable compression if the mode doesn't fit available BW */
drm_dbg_kms(&dev_priv->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
if (ret || intel_dp->force_dsc_en) {
/*
* FIXME: As bpc is hardcoded to 8, as mentioned above,
* WARN and ignore the debug flag force_dsc_bpc for now.
*/
drm_WARN(&dev_priv->drm, intel_dp->force_dsc_bpc, "Cannot Force BPC for MST\n");
/*
* Try to get at least some timeslots and then see, if
* we can fit there with DSC.