drm/i915/bdw: Avoid non-lite-restore preemptions
In the current Execlists feeding mechanism, full preemption is not supported yet: only lite-restores are allowed (this is: the GPU simply samples a new tail pointer for the context currently in execution). But we have identified an scenario in which a full preemption occurs: 1) We submit two contexts for execution (A & B). 2) The GPU finishes with the first one (A), switches to the second one (B) and informs us. 3) We submit B again (hoping to cause a lite restore) together with C, but in the time we spend writing to the ELSP, the GPU finishes B. 4) The GPU start executing B again (since we told it so). 5) We receive a B finished interrupt and, mistakenly, we submit C (again) and D, causing a full preemption of B. The race is avoided by keeping track of how many times a context has been submitted to the hardware and by better discriminating the received context switch interrupts: in the example, when we have submitted B twice, we won´t submit C and D as soon as we receive the notification that B is completed because we were expecting to get a LITE_RESTORE and we didn´t, so we know a second completion will be received shortly. Without this explicit checking, somehow, the batch buffer execution order gets messed with. This can be verified with the IGT test I sent together with the series. I don´t know the exact mechanism by which the pre-emption messes with the execution order but, since other people is working on the Scheduler + Preemption on Execlists, I didn´t try to fix it. In these series, only Lite Restores are supported (other kind of preemptions WARN). v2: elsp_submitted belongs in the new intel_ctx_submit_request. Several rebase changes. v3: Clarify how the race is avoided, as requested by Daniel. Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> [danvet: Align function parameters ...] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -268,6 +268,7 @@ static void execlists_context_unqueue(struct intel_engine_cs *ring)
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} else if (req0->ctx == cursor->ctx) {
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/* Same ctx: ignore first request, as second request
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* will update tail past first request's workload */
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cursor->elsp_submitted = req0->elsp_submitted;
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list_del(&req0->execlist_link);
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queue_work(dev_priv->wq, &req0->work);
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req0 = cursor;
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@ -277,9 +278,15 @@ static void execlists_context_unqueue(struct intel_engine_cs *ring)
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}
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}
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WARN_ON(req1 && req1->elsp_submitted);
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WARN_ON(execlists_submit_context(ring, req0->ctx, req0->tail,
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req1 ? req1->ctx : NULL,
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req1 ? req1->tail : 0));
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req0->elsp_submitted++;
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if (req1)
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req1->elsp_submitted++;
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}
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static bool execlists_check_remove_request(struct intel_engine_cs *ring,
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@ -298,9 +305,14 @@ static bool execlists_check_remove_request(struct intel_engine_cs *ring,
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struct drm_i915_gem_object *ctx_obj =
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head_req->ctx->engine[ring->id].state;
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if (intel_execlists_ctx_id(ctx_obj) == request_id) {
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list_del(&head_req->execlist_link);
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queue_work(dev_priv->wq, &head_req->work);
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return true;
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WARN(head_req->elsp_submitted == 0,
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"Never submitted head request\n");
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if (--head_req->elsp_submitted <= 0) {
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list_del(&head_req->execlist_link);
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queue_work(dev_priv->wq, &head_req->work);
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return true;
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}
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}
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}
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@ -333,7 +345,16 @@ void intel_execlists_handle_ctx_events(struct intel_engine_cs *ring)
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status_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) +
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(read_pointer % 6) * 8 + 4);
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if (status & GEN8_CTX_STATUS_COMPLETE) {
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if (status & GEN8_CTX_STATUS_PREEMPTED) {
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if (status & GEN8_CTX_STATUS_LITE_RESTORE) {
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if (execlists_check_remove_request(ring, status_id))
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WARN(1, "Lite Restored request removed from queue\n");
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} else
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WARN(1, "Preemption without Lite Restore\n");
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}
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if ((status & GEN8_CTX_STATUS_ACTIVE_IDLE) ||
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(status & GEN8_CTX_STATUS_ELEMENT_SWITCH)) {
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if (execlists_check_remove_request(ring, status_id))
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submit_contexts++;
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}
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@ -66,6 +66,8 @@ struct intel_ctx_submit_request {
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struct list_head execlist_link;
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struct work_struct work;
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int elsp_submitted;
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};
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void intel_execlists_handle_ctx_events(struct intel_engine_cs *ring);
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