ata: sata_rcar: really mask all interrupts on Gen2 and later
Since R-Car Gen2, a new bit has been introduced to the interrupt mask register. Update the code to handle it properly as well. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Tejun Heo <tj@kernel.org>
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@ -109,6 +109,8 @@
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#define SATAINTMASK_ERRMSK BIT(2)
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#define SATAINTMASK_ERRMSK BIT(2)
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#define SATAINTMASK_ERRCRTMSK BIT(1)
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#define SATAINTMASK_ERRCRTMSK BIT(1)
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#define SATAINTMASK_ATAMSK BIT(0)
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#define SATAINTMASK_ATAMSK BIT(0)
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#define SATAINTMASK_ALL_GEN1 0x7ff
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#define SATAINTMASK_ALL_GEN2 0xfff
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#define SATA_RCAR_INT_MASK (SATAINTMASK_SERRMSK | \
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#define SATA_RCAR_INT_MASK (SATAINTMASK_SERRMSK | \
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SATAINTMASK_ATAMSK)
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SATAINTMASK_ATAMSK)
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@ -152,6 +154,7 @@ enum sata_rcar_type {
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struct sata_rcar_priv {
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struct sata_rcar_priv {
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void __iomem *base;
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void __iomem *base;
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u32 sataint_mask;
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enum sata_rcar_type type;
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enum sata_rcar_type type;
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};
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};
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@ -225,7 +228,7 @@ static void sata_rcar_freeze(struct ata_port *ap)
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struct sata_rcar_priv *priv = ap->host->private_data;
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struct sata_rcar_priv *priv = ap->host->private_data;
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/* mask */
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/* mask */
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iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
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iowrite32(priv->sataint_mask, priv->base + SATAINTMASK_REG);
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ata_sff_freeze(ap);
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ata_sff_freeze(ap);
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}
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}
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@ -241,7 +244,7 @@ static void sata_rcar_thaw(struct ata_port *ap)
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ata_sff_thaw(ap);
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ata_sff_thaw(ap);
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/* unmask */
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/* unmask */
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iowrite32(0x7ff & ~SATA_RCAR_INT_MASK, base + SATAINTMASK_REG);
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iowrite32(priv->sataint_mask & ~SATA_RCAR_INT_MASK, base + SATAINTMASK_REG);
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}
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}
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static void sata_rcar_ioread16_rep(void __iomem *reg, void *buffer, int count)
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static void sata_rcar_ioread16_rep(void __iomem *reg, void *buffer, int count)
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@ -735,7 +738,7 @@ static irqreturn_t sata_rcar_interrupt(int irq, void *dev_instance)
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if (!sataintstat)
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if (!sataintstat)
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goto done;
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goto done;
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/* ack */
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/* ack */
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iowrite32(~sataintstat & 0x7ff, base + SATAINTSTAT_REG);
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iowrite32(~sataintstat & priv->sataint_mask, base + SATAINTSTAT_REG);
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ap = host->ports[0];
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ap = host->ports[0];
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@ -808,7 +811,7 @@ static void sata_rcar_init_module(struct sata_rcar_priv *priv)
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/* ack and mask */
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/* ack and mask */
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iowrite32(0, base + SATAINTSTAT_REG);
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iowrite32(0, base + SATAINTSTAT_REG);
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iowrite32(0x7ff, base + SATAINTMASK_REG);
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iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
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/* enable interrupts */
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/* enable interrupts */
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iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
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iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
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@ -818,9 +821,12 @@ static void sata_rcar_init_controller(struct ata_host *host)
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{
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{
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struct sata_rcar_priv *priv = host->private_data;
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struct sata_rcar_priv *priv = host->private_data;
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priv->sataint_mask = SATAINTMASK_ALL_GEN2;
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/* reset and setup phy */
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/* reset and setup phy */
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switch (priv->type) {
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switch (priv->type) {
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case RCAR_GEN1_SATA:
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case RCAR_GEN1_SATA:
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priv->sataint_mask = SATAINTMASK_ALL_GEN1;
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sata_rcar_gen1_phy_init(priv);
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sata_rcar_gen1_phy_init(priv);
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break;
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break;
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case RCAR_GEN2_SATA:
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case RCAR_GEN2_SATA:
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@ -948,7 +954,7 @@ static int sata_rcar_remove(struct platform_device *pdev)
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iowrite32(0, base + ATAPI_INT_ENABLE_REG);
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iowrite32(0, base + ATAPI_INT_ENABLE_REG);
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/* ack and mask */
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/* ack and mask */
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iowrite32(0, base + SATAINTSTAT_REG);
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iowrite32(0, base + SATAINTSTAT_REG);
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iowrite32(0x7ff, base + SATAINTMASK_REG);
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iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
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pm_runtime_put(&pdev->dev);
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pm_runtime_put(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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@ -969,7 +975,7 @@ static int sata_rcar_suspend(struct device *dev)
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/* disable interrupts */
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/* disable interrupts */
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iowrite32(0, base + ATAPI_INT_ENABLE_REG);
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iowrite32(0, base + ATAPI_INT_ENABLE_REG);
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/* mask */
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/* mask */
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iowrite32(0x7ff, base + SATAINTMASK_REG);
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iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
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pm_runtime_put(dev);
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pm_runtime_put(dev);
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}
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}
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@ -994,7 +1000,7 @@ static int sata_rcar_resume(struct device *dev)
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} else {
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} else {
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/* ack and mask */
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/* ack and mask */
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iowrite32(0, base + SATAINTSTAT_REG);
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iowrite32(0, base + SATAINTSTAT_REG);
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iowrite32(0x7ff, base + SATAINTMASK_REG);
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iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
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/* enable interrupts */
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/* enable interrupts */
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iowrite32(ATAPI_INT_ENABLE_SATAINT,
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iowrite32(ATAPI_INT_ENABLE_SATAINT,
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