Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu: - remove broken dt bindings in inside-secure - fix authencesn crash when used with digest_null - fix cavium/nitrox firmware path - fix SHA3 failure in brcm - fix Kconfig dependency for brcm * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: authencesn - Fix digest_null crash crypto: brcm - remove BCM_PDC_MBOX dependency in Kconfig Documentation/bindings: crypto: remove the dma-mask property crypto: inside-secure - do not parse the dma mask from dt crypto: cavium/nitrox - Change in firmware path. crypto: brcm - Fix SHA3-512 algorithm failure
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commit
e26f1bea3b
@ -8,7 +8,6 @@ Required properties:
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Optional properties:
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- clocks: Reference to the crypto engine clock.
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- dma-mask: The address mask limitation. Defaults to 64.
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Example:
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@ -24,6 +23,5 @@ Example:
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interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3",
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"eip";
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clocks = <&cpm_syscon0 1 26>;
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dma-mask = <0xff 0xffffffff>;
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status = "disabled";
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};
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@ -248,6 +248,9 @@ static int crypto_authenc_esn_decrypt_tail(struct aead_request *req,
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u8 *ihash = ohash + crypto_ahash_digestsize(auth);
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u32 tmp[2];
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if (!authsize)
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goto decrypt;
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/* Move high-order bits of sequence number back. */
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scatterwalk_map_and_copy(tmp, dst, 4, 4, 0);
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scatterwalk_map_and_copy(tmp + 1, dst, assoclen + cryptlen, 4, 0);
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@ -256,6 +259,8 @@ static int crypto_authenc_esn_decrypt_tail(struct aead_request *req,
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if (crypto_memneq(ihash, ohash, authsize))
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return -EBADMSG;
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decrypt:
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sg_init_table(areq_ctx->dst, 2);
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dst = scatterwalk_ffwd(areq_ctx->dst, dst, assoclen);
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@ -655,7 +655,7 @@ source "drivers/crypto/virtio/Kconfig"
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config CRYPTO_DEV_BCM_SPU
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tristate "Broadcom symmetric crypto/hash acceleration support"
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depends on ARCH_BCM_IPROC
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depends on BCM_PDC_MBOX
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depends on MAILBOX
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default m
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select CRYPTO_DES
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select CRYPTO_MD5
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@ -302,6 +302,7 @@ spu2_hash_xlate(enum hash_alg hash_alg, enum hash_mode hash_mode,
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break;
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case HASH_ALG_SHA3_512:
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*spu2_type = SPU2_HASH_TYPE_SHA3_512;
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break;
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case HASH_ALG_LAST:
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default:
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err = -EINVAL;
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@ -18,8 +18,9 @@
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#define SE_GROUP 0
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#define DRIVER_VERSION "1.0"
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#define FW_DIR "cavium/"
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/* SE microcode */
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#define SE_FW "cnn55xx_se.fw"
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#define SE_FW FW_DIR "cnn55xx_se.fw"
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static const char nitrox_driver_name[] = "CNN55XX";
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@ -773,7 +773,6 @@ static int safexcel_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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struct resource *res;
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struct safexcel_crypto_priv *priv;
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u64 dma_mask;
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int i, ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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@ -802,9 +801,7 @@ static int safexcel_probe(struct platform_device *pdev)
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return -EPROBE_DEFER;
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}
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if (of_property_read_u64(dev->of_node, "dma-mask", &dma_mask))
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dma_mask = DMA_BIT_MASK(64);
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ret = dma_set_mask_and_coherent(dev, dma_mask);
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ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
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if (ret)
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goto err_clk;
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