Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: USB: Add support for Mobilcom Debitel USB UMTS Surf-Stick to option driver USB: work around for EHCI with quirky periodic schedules USB: musb: Fix CPPI IRQs not being signaled USB: musb: respect usb_request->zero in control requests USB: musb: fix ISOC Tx programming for CPPI DMAs USB: musb: Remove unwanted message in boot log usb: amd5536udc: fixed shared interrupt bug and warning oops USB: ftdi_sio: Keep going when write errors are encountered. USB: musb_gadget: fix STALL handling USB: EHCI: don't send Clear-TT-Buffer following a STALL
This commit is contained in:
commit
e272a18643
@ -444,7 +444,7 @@ resubmit:
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static inline int
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hub_clear_tt_buffer (struct usb_device *hdev, u16 devinfo, u16 tt)
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{
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return usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0),
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return usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0),
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HUB_CLEAR_TT_BUFFER, USB_RT_PORT, devinfo,
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tt, NULL, 0, 1000);
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}
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|
@ -1213,7 +1213,12 @@ udc_queue(struct usb_ep *usbep, struct usb_request *usbreq, gfp_t gfp)
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tmp &= AMD_UNMASK_BIT(ep->num);
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writel(tmp, &dev->regs->ep_irqmsk);
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}
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}
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} else if (ep->in) {
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/* enable ep irq */
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tmp = readl(&dev->regs->ep_irqmsk);
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tmp &= AMD_UNMASK_BIT(ep->num);
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writel(tmp, &dev->regs->ep_irqmsk);
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}
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} else if (ep->dma) {
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@ -2005,18 +2010,17 @@ __acquires(dev->lock)
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{
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int tmp;
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/* empty queues and init hardware */
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udc_basic_init(dev);
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for (tmp = 0; tmp < UDC_EP_NUM; tmp++) {
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empty_req_queue(&dev->ep[tmp]);
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}
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if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
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spin_unlock(&dev->lock);
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driver->disconnect(&dev->gadget);
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spin_lock(&dev->lock);
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}
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/* init */
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/* empty queues and init hardware */
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udc_basic_init(dev);
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for (tmp = 0; tmp < UDC_EP_NUM; tmp++)
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empty_req_queue(&dev->ep[tmp]);
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udc_setup_endpoints(dev);
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}
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@ -2472,6 +2476,13 @@ static irqreturn_t udc_data_in_isr(struct udc *dev, int ep_ix)
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}
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}
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} else if (!use_dma && ep->in) {
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/* disable interrupt */
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tmp = readl(
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&dev->regs->ep_irqmsk);
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tmp |= AMD_BIT(ep->num);
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writel(tmp,
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&dev->regs->ep_irqmsk);
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}
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}
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/* clear status bits */
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@ -3279,6 +3290,17 @@ static int udc_pci_probe(
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goto finished;
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}
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spin_lock_init(&dev->lock);
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/* udc csr registers base */
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dev->csr = dev->virt_addr + UDC_CSR_ADDR;
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/* dev registers base */
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dev->regs = dev->virt_addr + UDC_DEVCFG_ADDR;
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/* ep registers base */
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dev->ep_regs = dev->virt_addr + UDC_EPREGS_ADDR;
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/* fifo's base */
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dev->rxfifo = (u32 __iomem *)(dev->virt_addr + UDC_RXFIFO_ADDR);
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dev->txfifo = (u32 __iomem *)(dev->virt_addr + UDC_TXFIFO_ADDR);
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if (request_irq(pdev->irq, udc_irq, IRQF_SHARED, name, dev) != 0) {
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dev_dbg(&dev->pdev->dev, "request_irq(%d) fail\n", pdev->irq);
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kfree(dev);
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@ -3331,7 +3353,6 @@ static int udc_probe(struct udc *dev)
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udc_pollstall_timer.data = 0;
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/* device struct setup */
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spin_lock_init(&dev->lock);
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dev->gadget.ops = &udc_ops;
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dev_set_name(&dev->gadget.dev, "gadget");
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@ -3340,16 +3361,6 @@ static int udc_probe(struct udc *dev)
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dev->gadget.name = name;
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dev->gadget.is_dualspeed = 1;
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/* udc csr registers base */
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dev->csr = dev->virt_addr + UDC_CSR_ADDR;
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/* dev registers base */
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dev->regs = dev->virt_addr + UDC_DEVCFG_ADDR;
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/* ep registers base */
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dev->ep_regs = dev->virt_addr + UDC_EPREGS_ADDR;
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/* fifo's base */
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dev->rxfifo = (u32 __iomem *)(dev->virt_addr + UDC_RXFIFO_ADDR);
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dev->txfifo = (u32 __iomem *)(dev->virt_addr + UDC_TXFIFO_ADDR);
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/* init registers, interrupts, ... */
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startup_registers(dev);
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@ -28,6 +28,7 @@
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/timer.h>
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#include <linux/ktime.h>
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#include <linux/list.h>
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#include <linux/interrupt.h>
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#include <linux/usb.h>
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@ -676,6 +677,7 @@ static int ehci_run (struct usb_hcd *hcd)
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ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
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msleep(5);
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up_write(&ehci_cf_port_reset_rwsem);
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ehci->last_periodic_enable = ktime_get_real();
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temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
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ehci_info (ehci,
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@ -111,6 +111,10 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
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switch (pdev->vendor) {
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case PCI_VENDOR_ID_INTEL:
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ehci->need_io_watchdog = 0;
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if (pdev->device == 0x27cc) {
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ehci->broken_periodic = 1;
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ehci_info(ehci, "using broken periodic workaround\n");
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}
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break;
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case PCI_VENDOR_ID_TDI:
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if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
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@ -487,8 +487,20 @@ halt:
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* we must clear the TT buffer (11.17.5).
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*/
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if (unlikely(last_status != -EINPROGRESS &&
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last_status != -EREMOTEIO))
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ehci_clear_tt_buffer(ehci, qh, urb, token);
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last_status != -EREMOTEIO)) {
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/* The TT's in some hubs malfunction when they
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* receive this request following a STALL (they
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* stop sending isochronous packets). Since a
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* STALL can't leave the TT buffer in a busy
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* state (if you believe Figures 11-48 - 11-51
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* in the USB 2.0 spec), we won't clear the TT
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* buffer in this case. Strictly speaking this
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* is a violation of the spec.
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*/
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if (last_status != -EPIPE)
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ehci_clear_tt_buffer(ehci, qh, urb,
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token);
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}
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}
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/* if we're removing something not at the queue head,
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@ -475,6 +475,8 @@ static int enable_periodic (struct ehci_hcd *ehci)
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/* make sure ehci_work scans these */
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ehci->next_uframe = ehci_readl(ehci, &ehci->regs->frame_index)
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% (ehci->periodic_size << 3);
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if (unlikely(ehci->broken_periodic))
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ehci->last_periodic_enable = ktime_get_real();
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return 0;
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}
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@ -486,6 +488,16 @@ static int disable_periodic (struct ehci_hcd *ehci)
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if (--ehci->periodic_sched)
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return 0;
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if (unlikely(ehci->broken_periodic)) {
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/* delay experimentally determined */
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ktime_t safe = ktime_add_us(ehci->last_periodic_enable, 1000);
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ktime_t now = ktime_get_real();
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s64 delay = ktime_us_delta(safe, now);
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if (unlikely(delay > 0))
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udelay(delay);
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}
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/* did setting PSE not take effect yet?
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* takes effect only at frame boundaries...
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*/
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@ -118,6 +118,7 @@ struct ehci_hcd { /* one per controller */
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unsigned stamp;
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unsigned random_frame;
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unsigned long next_statechange;
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ktime_t last_periodic_enable;
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u32 command;
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/* SILICON QUIRKS */
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@ -127,6 +128,7 @@ struct ehci_hcd { /* one per controller */
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unsigned big_endian_desc:1;
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unsigned has_amcc_usb23:1;
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unsigned need_io_watchdog:1;
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unsigned broken_periodic:1;
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/* required for usb32 quirk */
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#define OHCI_CTRL_HCFS (3 << 6)
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@ -1442,11 +1442,6 @@ static int cppi_channel_abort(struct dma_channel *channel)
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musb_writew(regs, MUSB_TXCSR, value);
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musb_writew(regs, MUSB_TXCSR, value);
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/* re-enable interrupt */
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if (enabled)
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musb_writel(tibase, DAVINCI_TXCPPI_INTENAB_REG,
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(1 << cppi_ch->index));
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/* While we scrub the TX state RAM, ensure that we clean
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* up any interrupt that's currently asserted:
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* 1. Write to completion Ptr value 0x1(bit 0 set)
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@ -1459,6 +1454,11 @@ static int cppi_channel_abort(struct dma_channel *channel)
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cppi_reset_tx(tx_ram, 1);
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musb_writel(&tx_ram->tx_complete, 0, 0);
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/* re-enable interrupt */
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if (enabled)
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musb_writel(tibase, DAVINCI_TXCPPI_INTENAB_REG,
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(1 << cppi_ch->index));
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cppi_dump_tx(5, cppi_ch, " (done teardown)");
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/* REVISIT tx side _should_ clean up the same way
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|
@ -1450,7 +1450,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
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#endif
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if (hw_ep->max_packet_sz_tx) {
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printk(KERN_DEBUG
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DBG(1,
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"%s: hw_ep %d%s, %smax %d\n",
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musb_driver_name, i,
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hw_ep->is_shared_fifo ? "shared" : "tx",
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@ -1459,7 +1459,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
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hw_ep->max_packet_sz_tx);
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}
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if (hw_ep->max_packet_sz_rx && !hw_ep->is_shared_fifo) {
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printk(KERN_DEBUG
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DBG(1,
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"%s: hw_ep %d%s, %smax %d\n",
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musb_driver_name, i,
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"rx",
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|
@ -4,6 +4,7 @@
|
||||
* Copyright 2005 Mentor Graphics Corporation
|
||||
* Copyright (C) 2005-2006 by Texas Instruments
|
||||
* Copyright (C) 2006-2007 Nokia Corporation
|
||||
* Copyright (C) 2009 MontaVista Software, Inc. <source@mvista.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
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@ -436,14 +437,6 @@ void musb_g_tx(struct musb *musb, u8 epnum)
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csr |= MUSB_TXCSR_P_WZC_BITS;
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csr &= ~MUSB_TXCSR_P_SENTSTALL;
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musb_writew(epio, MUSB_TXCSR, csr);
|
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if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
|
||||
dma->status = MUSB_DMA_STATUS_CORE_ABORT;
|
||||
musb->dma_controller->channel_abort(dma);
|
||||
}
|
||||
|
||||
if (request)
|
||||
musb_g_giveback(musb_ep, request, -EPIPE);
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
@ -582,15 +575,25 @@ void musb_g_tx(struct musb *musb, u8 epnum)
|
||||
*/
|
||||
static void rxstate(struct musb *musb, struct musb_request *req)
|
||||
{
|
||||
u16 csr = 0;
|
||||
const u8 epnum = req->epnum;
|
||||
struct usb_request *request = &req->request;
|
||||
struct musb_ep *musb_ep = &musb->endpoints[epnum].ep_out;
|
||||
void __iomem *epio = musb->endpoints[epnum].regs;
|
||||
unsigned fifo_count = 0;
|
||||
u16 len = musb_ep->packet_sz;
|
||||
u16 csr = musb_readw(epio, MUSB_RXCSR);
|
||||
|
||||
csr = musb_readw(epio, MUSB_RXCSR);
|
||||
/* We shouldn't get here while DMA is active, but we do... */
|
||||
if (dma_channel_status(musb_ep->dma) == MUSB_DMA_STATUS_BUSY) {
|
||||
DBG(4, "DMA pending...\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (csr & MUSB_RXCSR_P_SENDSTALL) {
|
||||
DBG(5, "%s stalling, RXCSR %04x\n",
|
||||
musb_ep->end_point.name, csr);
|
||||
return;
|
||||
}
|
||||
|
||||
if (is_cppi_enabled() && musb_ep->dma) {
|
||||
struct dma_controller *c = musb->dma_controller;
|
||||
@ -761,19 +764,10 @@ void musb_g_rx(struct musb *musb, u8 epnum)
|
||||
csr, dma ? " (dma)" : "", request);
|
||||
|
||||
if (csr & MUSB_RXCSR_P_SENTSTALL) {
|
||||
if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
|
||||
dma->status = MUSB_DMA_STATUS_CORE_ABORT;
|
||||
(void) musb->dma_controller->channel_abort(dma);
|
||||
request->actual += musb_ep->dma->actual_len;
|
||||
}
|
||||
|
||||
csr |= MUSB_RXCSR_P_WZC_BITS;
|
||||
csr &= ~MUSB_RXCSR_P_SENTSTALL;
|
||||
musb_writew(epio, MUSB_RXCSR, csr);
|
||||
|
||||
if (request)
|
||||
musb_g_giveback(musb_ep, request, -EPIPE);
|
||||
goto done;
|
||||
return;
|
||||
}
|
||||
|
||||
if (csr & MUSB_RXCSR_P_OVERRUN) {
|
||||
@ -795,7 +789,7 @@ void musb_g_rx(struct musb *musb, u8 epnum)
|
||||
DBG((csr & MUSB_RXCSR_DMAENAB) ? 4 : 1,
|
||||
"%s busy, csr %04x\n",
|
||||
musb_ep->end_point.name, csr);
|
||||
goto done;
|
||||
return;
|
||||
}
|
||||
|
||||
if (dma && (csr & MUSB_RXCSR_DMAENAB)) {
|
||||
@ -826,22 +820,15 @@ void musb_g_rx(struct musb *musb, u8 epnum)
|
||||
if ((request->actual < request->length)
|
||||
&& (musb_ep->dma->actual_len
|
||||
== musb_ep->packet_sz))
|
||||
goto done;
|
||||
return;
|
||||
#endif
|
||||
musb_g_giveback(musb_ep, request, 0);
|
||||
|
||||
request = next_request(musb_ep);
|
||||
if (!request)
|
||||
goto done;
|
||||
|
||||
/* don't start more i/o till the stall clears */
|
||||
musb_ep_select(mbase, epnum);
|
||||
csr = musb_readw(epio, MUSB_RXCSR);
|
||||
if (csr & MUSB_RXCSR_P_SENDSTALL)
|
||||
goto done;
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
/* analyze request if the ep is hot */
|
||||
if (request)
|
||||
rxstate(musb, to_musb_request(request));
|
||||
@ -849,8 +836,6 @@ void musb_g_rx(struct musb *musb, u8 epnum)
|
||||
DBG(3, "packet waiting for %s%s request\n",
|
||||
musb_ep->desc ? "" : "inactive ",
|
||||
musb_ep->end_point.name);
|
||||
|
||||
done:
|
||||
return;
|
||||
}
|
||||
|
||||
@ -1244,7 +1229,7 @@ int musb_gadget_set_halt(struct usb_ep *ep, int value)
|
||||
void __iomem *mbase;
|
||||
unsigned long flags;
|
||||
u16 csr;
|
||||
struct musb_request *request = NULL;
|
||||
struct musb_request *request;
|
||||
int status = 0;
|
||||
|
||||
if (!ep)
|
||||
@ -1260,24 +1245,29 @@ int musb_gadget_set_halt(struct usb_ep *ep, int value)
|
||||
|
||||
musb_ep_select(mbase, epnum);
|
||||
|
||||
/* cannot portably stall with non-empty FIFO */
|
||||
request = to_musb_request(next_request(musb_ep));
|
||||
if (value && musb_ep->is_in) {
|
||||
csr = musb_readw(epio, MUSB_TXCSR);
|
||||
if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
|
||||
DBG(3, "%s fifo busy, cannot halt\n", ep->name);
|
||||
spin_unlock_irqrestore(&musb->lock, flags);
|
||||
return -EAGAIN;
|
||||
if (value) {
|
||||
if (request) {
|
||||
DBG(3, "request in progress, cannot halt %s\n",
|
||||
ep->name);
|
||||
status = -EAGAIN;
|
||||
goto done;
|
||||
}
|
||||
/* Cannot portably stall with non-empty FIFO */
|
||||
if (musb_ep->is_in) {
|
||||
csr = musb_readw(epio, MUSB_TXCSR);
|
||||
if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
|
||||
DBG(3, "FIFO busy, cannot halt %s\n", ep->name);
|
||||
status = -EAGAIN;
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* set/clear the stall and toggle bits */
|
||||
DBG(2, "%s: %s stall\n", ep->name, value ? "set" : "clear");
|
||||
if (musb_ep->is_in) {
|
||||
csr = musb_readw(epio, MUSB_TXCSR);
|
||||
if (csr & MUSB_TXCSR_FIFONOTEMPTY)
|
||||
csr |= MUSB_TXCSR_FLUSHFIFO;
|
||||
csr |= MUSB_TXCSR_P_WZC_BITS
|
||||
| MUSB_TXCSR_CLRDATATOG;
|
||||
if (value)
|
||||
@ -1300,14 +1290,13 @@ int musb_gadget_set_halt(struct usb_ep *ep, int value)
|
||||
musb_writew(epio, MUSB_RXCSR, csr);
|
||||
}
|
||||
|
||||
done:
|
||||
|
||||
/* maybe start the first request in the queue */
|
||||
if (!musb_ep->busy && !value && request) {
|
||||
DBG(3, "restarting the request\n");
|
||||
musb_ep_restart(musb, request);
|
||||
}
|
||||
|
||||
done:
|
||||
spin_unlock_irqrestore(&musb->lock, flags);
|
||||
return status;
|
||||
}
|
||||
|
@ -511,7 +511,8 @@ static void ep0_txstate(struct musb *musb)
|
||||
|
||||
/* update the flags */
|
||||
if (fifo_count < MUSB_MAX_END0_PACKET
|
||||
|| request->actual == request->length) {
|
||||
|| (request->actual == request->length
|
||||
&& !request->zero)) {
|
||||
musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT;
|
||||
csr |= MUSB_CSR0_P_DATAEND;
|
||||
} else
|
||||
|
@ -1301,8 +1301,11 @@ void musb_host_tx(struct musb *musb, u8 epnum)
|
||||
return;
|
||||
} else if (usb_pipeisoc(pipe) && dma) {
|
||||
if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb,
|
||||
offset, length))
|
||||
offset, length)) {
|
||||
if (is_cppi_enabled() || tusb_dma_omap())
|
||||
musb_h_tx_dma_start(hw_ep);
|
||||
return;
|
||||
}
|
||||
} else if (tx_csr & MUSB_TXCSR_DMAENAB) {
|
||||
DBG(1, "not complete, but DMA enabled?\n");
|
||||
return;
|
||||
|
@ -1937,7 +1937,7 @@ static void ftdi_write_bulk_callback(struct urb *urb)
|
||||
return;
|
||||
}
|
||||
/* account for transferred data */
|
||||
countback = urb->actual_length;
|
||||
countback = urb->transfer_buffer_length;
|
||||
data_offset = priv->write_offset;
|
||||
if (data_offset > 0) {
|
||||
/* Subtract the control bytes */
|
||||
@ -1950,7 +1950,6 @@ static void ftdi_write_bulk_callback(struct urb *urb)
|
||||
|
||||
if (status) {
|
||||
dbg("nonzero write bulk status received: %d", status);
|
||||
return;
|
||||
}
|
||||
|
||||
usb_serial_port_softint(port);
|
||||
|
@ -336,6 +336,10 @@ static int option_resume(struct usb_serial *serial);
|
||||
#define AIRPLUS_VENDOR_ID 0x1011
|
||||
#define AIRPLUS_PRODUCT_MCD650 0x3198
|
||||
|
||||
/* 4G Systems products */
|
||||
#define FOUR_G_SYSTEMS_VENDOR_ID 0x1c9e
|
||||
#define FOUR_G_SYSTEMS_PRODUCT_W14 0x9603
|
||||
|
||||
static struct usb_device_id option_ids[] = {
|
||||
{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) },
|
||||
{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) },
|
||||
@ -599,6 +603,7 @@ static struct usb_device_id option_ids[] = {
|
||||
{ USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S) },
|
||||
{ USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) },
|
||||
{ USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) },
|
||||
{ USB_DEVICE(FOUR_G_SYSTEMS_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14) },
|
||||
{ } /* Terminating entry */
|
||||
};
|
||||
MODULE_DEVICE_TABLE(usb, option_ids);
|
||||
|
Loading…
Reference in New Issue
Block a user