A few more DT patches for 5.10, to support simple-framebuffer on the v3s
and the pinecube board -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCX3HKAwAKCRDj7w1vZxhR xc3bAQCcnys+hZ4XtwA/GIT10zcvpBVkUrjU56zZPG9WiEA9AgD/S9PN5m6J0R7O F8dU+0Xx8O+3KNwIhuqEw2Mj7WHpcwE= =6hIV -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt A few more DT patches for 5.10, to support simple-framebuffer on the v3s and the pinecube board * tag 'sunxi-dt-for-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sun8i: v3s: Add simple-framebuffer ARM: dts: sun8i: s3l: add support for Pine64 PineCube IP camera dt-bindings: arm: sunxi: add Pine64 PineCube binding ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for I2C1 at PE bank ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for 8-bit parallel CSI ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for UART2 RX/TX ARM: dts: sun8i: V3/V3s/S3/S3L: add Ethernet support Link: https://lore.kernel.org/r/e7c12b59-8603-438d-908b-5f0bde2c8697.lettre@localhost Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
e27312539a
@ -631,6 +631,11 @@ properties:
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- const: pine64,pine64-plus
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- const: allwinner,sun50i-a64
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- description: Pine64 PineCube
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items:
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- const: pine64,pinecube
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- const: allwinner,sun8i-s3
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- description: Pine64 PineH64 model A
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items:
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- const: pine64,pine-h64
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@ -1206,6 +1206,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-r16-parrot.dtb \
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sun8i-r40-bananapi-m2-ultra.dtb \
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sun8i-s3-lichee-zero-plus.dtb \
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sun8i-s3-pinecube.dtb \
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sun8i-t3-cqa3t-bv3.dtb \
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sun8i-v3s-licheepi-zero.dtb \
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sun8i-v3s-licheepi-zero-dock.dtb \
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235
arch/arm/boot/dts/sun8i-s3-pinecube.dts
Normal file
235
arch/arm/boot/dts/sun8i-s3-pinecube.dts
Normal file
@ -0,0 +1,235 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR X11)
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/*
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* Copyright 2019 Icenowy Zheng <icenowy@aosc.io>
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*/
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/dts-v1/;
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#include "sun8i-v3.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "PineCube IP Camera";
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compatible = "pine64,pinecube", "allwinner,sun8i-s3";
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aliases {
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serial0 = &uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led1 {
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label = "pine64:ir:led1";
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gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
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};
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led2 {
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label = "pine64:ir:led2";
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gpios = <&pio 1 12 GPIO_ACTIVE_LOW>; /* PB12 */
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};
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};
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reg_vcc5v0: vcc5v0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_vcc_wifi: vcc-wifi {
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compatible = "regulator-fixed";
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regulator-name = "vcc-wifi";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pio 1 2 GPIO_ACTIVE_LOW>; /* PB2 WIFI-EN */
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vin-supply = <®_dcdc3>;
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startup-delay-us = <200000>;
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};
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wifi_pwrseq: wifi_pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 WIFI-RST */
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post-power-on-delay-ms = <200>;
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};
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};
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&csi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&csi1_8bit_pins>;
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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csi1_ep: endpoint {
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remote-endpoint = <&ov5640_ep>;
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bus-width = <8>;
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hsync-active = <1>; /* Active high */
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vsync-active = <0>; /* Active low */
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data-active = <1>; /* Active high */
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pclk-sample = <1>; /* Rising */
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};
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};
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};
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&emac {
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phy-handle = <&int_mii_phy>;
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phy-mode = "mii";
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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axp209: pmic@34 {
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compatible = "x-powers,axp203",
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"x-powers,axp209";
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reg = <0x34>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pe_pins>;
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status = "okay";
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ov5640: camera@3c {
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compatible = "ovti,ov5640";
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reg = <0x3c>;
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pinctrl-names = "default";
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pinctrl-0 = <&csi1_mclk_pin>;
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clocks = <&ccu CLK_CSI1_MCLK>;
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clock-names = "xclk";
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AVDD-supply = <®_ldo3>;
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DOVDD-supply = <®_ldo3>;
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DVDD-supply = <®_ldo4>;
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reset-gpios = <&pio 4 23 GPIO_ACTIVE_LOW>; /* PE23 */
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powerdown-gpios = <&pio 4 24 GPIO_ACTIVE_HIGH>; /* PE24 */
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port {
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ov5640_ep: endpoint {
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remote-endpoint = <&csi1_ep>;
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bus-width = <8>;
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hsync-active = <1>; /* Active high */
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vsync-active = <0>; /* Active low */
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data-active = <1>; /* Active high */
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pclk-sample = <1>; /* Rising */
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};
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};
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};
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};
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&lradc {
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vref-supply = <®_ldo2>;
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status = "okay";
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button-200 {
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label = "Setup";
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linux,code = <KEY_SETUP>;
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channel = <0>;
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voltage = <190000>;
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};
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};
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&mmc0 {
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vmmc-supply = <®_dcdc3>;
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bus-width = <4>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&mmc1 {
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vmmc-supply = <®_vcc_wifi>;
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vqmmc-supply = <®_dcdc3>;
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mmc-pwrseq = <&wifi_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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};
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&pio {
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vcc-pd-supply = <®_dcdc3>;
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vcc-pe-supply = <®_ldo3>;
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};
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#include "axp209.dtsi"
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&ac_power_supply {
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status = "okay";
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};
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®_dcdc2 {
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regulator-always-on;
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regulator-min-microvolt = <1250000>;
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regulator-max-microvolt = <1250000>;
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regulator-name = "vdd-sys-cpu-ephy";
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};
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®_dcdc3 {
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-3v3";
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};
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®_ldo1 {
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regulator-name = "vdd-rtc";
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};
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®_ldo2 {
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regulator-always-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "avcc";
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};
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®_ldo3 {
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-name = "avdd-dovdd-2v8-csi";
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regulator-soft-start;
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regulator-ramp-delay = <1600>;
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};
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®_ldo4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "dvdd-1v8-csi";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "winbond,w25q128", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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};
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};
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&uart2 {
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status = "okay";
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};
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&usb_otg {
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dr_mode = "host";
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status = "okay";
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};
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&usbphy {
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usb0_vbus-supply = <®_vcc5v0>;
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status = "okay";
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};
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@ -9,6 +9,19 @@
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compatible = "allwinner,sun8i-v3-ccu";
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};
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&emac {
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/delete-property/ phy-handle;
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/delete-property/ phy-mode;
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};
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&mdio_mux {
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external_mdio: mdio@2 {
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reg = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&pio {
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compatible = "allwinner,sun8i-v3-pinctrl";
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};
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@ -43,12 +43,28 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/sun8i-v3s-ccu.h>
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#include <dt-bindings/reset/sun8i-v3s-ccu.h>
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#include <dt-bindings/clock/sun8i-de2.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&gic>;
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chosen {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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framebuffer-lcd {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "mixer0-lcd0";
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clocks = <&display_clocks CLK_MIXER0>,
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<&ccu CLK_TCON0>;
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status = "disabled";
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -138,6 +154,15 @@
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};
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};
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syscon: system-control@1c00000 {
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compatible = "allwinner,sun8i-v3s-system-control",
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"allwinner,sun8i-h3-system-control";
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reg = <0x01c00000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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};
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tcon0: lcd-controller@1c0c000 {
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compatible = "allwinner,sun8i-v3s-tcon";
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reg = <0x01c0c000 0x1000>;
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@ -303,16 +328,41 @@
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interrupt-controller;
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#interrupt-cells = <3>;
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/omit-if-no-ref/
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csi1_8bit_pins: csi1-8bit-pins {
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pins = "PE0", "PE2", "PE3", "PE8", "PE9",
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"PE10", "PE11", "PE12", "PE13", "PE14",
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"PE15";
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function = "csi";
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};
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/omit-if-no-ref/
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csi1_mclk_pin: csi1-mclk-pin {
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pins = "PE1";
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function = "csi";
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};
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i2c0_pins: i2c0-pins {
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pins = "PB6", "PB7";
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function = "i2c0";
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};
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/omit-if-no-ref/
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i2c1_pe_pins: i2c1-pe-pins {
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pins = "PE21", "PE22";
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function = "i2c1";
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};
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uart0_pb_pins: uart0-pb-pins {
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pins = "PB8", "PB9";
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function = "uart0";
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};
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uart2_pins: uart2-pins {
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pins = "PB0", "PB1";
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function = "uart2";
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};
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mmc0_pins: mmc0-pins {
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pins = "PF0", "PF1", "PF2", "PF3",
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"PF4", "PF5";
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@ -388,6 +438,8 @@
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reg-io-width = <4>;
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clocks = <&ccu CLK_BUS_UART2>;
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resets = <&ccu RST_BUS_UART2>;
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pinctrl-0 = <&uart2_pins>;
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pinctrl-names = "default";
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status = "disabled";
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};
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@ -415,6 +467,49 @@
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#size-cells = <0>;
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};
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emac: ethernet@1c30000 {
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compatible = "allwinner,sun8i-v3s-emac";
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syscon = <&syscon>;
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reg = <0x01c30000 0x10000>;
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interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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resets = <&ccu RST_BUS_EMAC>;
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reset-names = "stmmaceth";
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clocks = <&ccu CLK_BUS_EMAC>;
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clock-names = "stmmaceth";
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phy-handle = <&int_mii_phy>;
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phy-mode = "mii";
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status = "disabled";
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mdio: mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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};
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mdio_mux: mdio-mux {
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compatible = "allwinner,sun8i-h3-mdio-mux";
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#address-cells = <1>;
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#size-cells = <0>;
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mdio-parent-bus = <&mdio>;
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/* Only one MDIO is usable at the time */
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internal_mdio: mdio@1 {
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compatible = "allwinner,sun8i-h3-mdio-internal";
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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int_mii_phy: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
|
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clocks = <&ccu CLK_BUS_EPHY>;
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resets = <&ccu RST_BUS_EPHY>;
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||||
};
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||||
};
|
||||
};
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||||
};
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||||
|
||||
spi0: spi@1c68000 {
|
||||
compatible = "allwinner,sun8i-h3-spi";
|
||||
reg = <0x01c68000 0x1000>;
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||||
@ -429,6 +524,18 @@
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||||
#size-cells = <0>;
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||||
};
|
||||
|
||||
csi1: camera@1cb4000 {
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||||
compatible = "allwinner,sun8i-v3s-csi";
|
||||
reg = <0x01cb4000 0x3000>;
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_CSI>,
|
||||
<&ccu CLK_CSI1_SCLK>,
|
||||
<&ccu CLK_DRAM_CSI>;
|
||||
clock-names = "bus", "mod", "ram";
|
||||
resets = <&ccu RST_BUS_CSI>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gic: interrupt-controller@1c81000 {
|
||||
compatible = "arm,gic-400";
|
||||
reg = <0x01c81000 0x1000>,
|
||||
|
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Block a user