A few more DT patches for 5.10, to support simple-framebuffer on the v3s

and the pinecube board
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Merge tag 'sunxi-dt-for-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

A few more DT patches for 5.10, to support simple-framebuffer on the v3s
and the pinecube board

* tag 'sunxi-dt-for-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: dts: sun8i: v3s: Add simple-framebuffer
  ARM: dts: sun8i: s3l: add support for Pine64 PineCube IP camera
  dt-bindings: arm: sunxi: add Pine64 PineCube binding
  ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for I2C1 at PE bank
  ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for 8-bit parallel CSI
  ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node
  ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for UART2 RX/TX
  ARM: dts: sun8i: V3/V3s/S3/S3L: add Ethernet support

Link: https://lore.kernel.org/r/e7c12b59-8603-438d-908b-5f0bde2c8697.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-10-03 12:42:03 -07:00
commit e27312539a
5 changed files with 361 additions and 0 deletions

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@ -631,6 +631,11 @@ properties:
- const: pine64,pine64-plus
- const: allwinner,sun50i-a64
- description: Pine64 PineCube
items:
- const: pine64,pinecube
- const: allwinner,sun8i-s3
- description: Pine64 PineH64 model A
items:
- const: pine64,pine-h64

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@ -1206,6 +1206,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-r16-parrot.dtb \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-s3-lichee-zero-plus.dtb \
sun8i-s3-pinecube.dtb \
sun8i-t3-cqa3t-bv3.dtb \
sun8i-v3s-licheepi-zero.dtb \
sun8i-v3s-licheepi-zero-dock.dtb \

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@ -0,0 +1,235 @@
// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
* Copyright 2019 Icenowy Zheng <icenowy@aosc.io>
*/
/dts-v1/;
#include "sun8i-v3.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "PineCube IP Camera";
compatible = "pine64,pinecube", "allwinner,sun8i-s3";
aliases {
serial0 = &uart2;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
led1 {
label = "pine64:ir:led1";
gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
};
led2 {
label = "pine64:ir:led2";
gpios = <&pio 1 12 GPIO_ACTIVE_LOW>; /* PB12 */
};
};
reg_vcc5v0: vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_vcc_wifi: vcc-wifi {
compatible = "regulator-fixed";
regulator-name = "vcc-wifi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pio 1 2 GPIO_ACTIVE_LOW>; /* PB2 WIFI-EN */
vin-supply = <&reg_dcdc3>;
startup-delay-us = <200000>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 WIFI-RST */
post-power-on-delay-ms = <200>;
};
};
&csi1 {
pinctrl-names = "default";
pinctrl-0 = <&csi1_8bit_pins>;
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
csi1_ep: endpoint {
remote-endpoint = <&ov5640_ep>;
bus-width = <8>;
hsync-active = <1>; /* Active high */
vsync-active = <0>; /* Active low */
data-active = <1>; /* Active high */
pclk-sample = <1>; /* Rising */
};
};
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
status = "okay";
};
&i2c0 {
status = "okay";
axp209: pmic@34 {
compatible = "x-powers,axp203",
"x-powers,axp209";
reg = <0x34>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pe_pins>;
status = "okay";
ov5640: camera@3c {
compatible = "ovti,ov5640";
reg = <0x3c>;
pinctrl-names = "default";
pinctrl-0 = <&csi1_mclk_pin>;
clocks = <&ccu CLK_CSI1_MCLK>;
clock-names = "xclk";
AVDD-supply = <&reg_ldo3>;
DOVDD-supply = <&reg_ldo3>;
DVDD-supply = <&reg_ldo4>;
reset-gpios = <&pio 4 23 GPIO_ACTIVE_LOW>; /* PE23 */
powerdown-gpios = <&pio 4 24 GPIO_ACTIVE_HIGH>; /* PE24 */
port {
ov5640_ep: endpoint {
remote-endpoint = <&csi1_ep>;
bus-width = <8>;
hsync-active = <1>; /* Active high */
vsync-active = <0>; /* Active low */
data-active = <1>; /* Active high */
pclk-sample = <1>; /* Rising */
};
};
};
};
&lradc {
vref-supply = <&reg_ldo2>;
status = "okay";
button-200 {
label = "Setup";
linux,code = <KEY_SETUP>;
channel = <0>;
voltage = <190000>;
};
};
&mmc0 {
vmmc-supply = <&reg_dcdc3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_vcc_wifi>;
vqmmc-supply = <&reg_dcdc3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
};
&pio {
vcc-pd-supply = <&reg_dcdc3>;
vcc-pe-supply = <&reg_ldo3>;
};
#include "axp209.dtsi"
&ac_power_supply {
status = "okay";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <1250000>;
regulator-name = "vdd-sys-cpu-ephy";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_ldo1 {
regulator-name = "vdd-rtc";
};
&reg_ldo2 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
&reg_ldo3 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "avdd-dovdd-2v8-csi";
regulator-soft-start;
regulator-ramp-delay = <1600>;
};
&reg_ldo4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dvdd-1v8-csi";
};
&spi0 {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q128", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
};
};
&uart2 {
status = "okay";
};
&usb_otg {
dr_mode = "host";
status = "okay";
};
&usbphy {
usb0_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};

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@ -9,6 +9,19 @@
compatible = "allwinner,sun8i-v3-ccu";
};
&emac {
/delete-property/ phy-handle;
/delete-property/ phy-mode;
};
&mdio_mux {
external_mdio: mdio@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
};
&pio {
compatible = "allwinner,sun8i-v3-pinctrl";
};

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@ -43,12 +43,28 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun8i-v3s-ccu.h>
#include <dt-bindings/reset/sun8i-v3s-ccu.h>
#include <dt-bindings/clock/sun8i-de2.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
chosen {
#address-cells = <1>;
#size-cells = <1>;
ranges;
framebuffer-lcd {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "mixer0-lcd0";
clocks = <&display_clocks CLK_MIXER0>,
<&ccu CLK_TCON0>;
status = "disabled";
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@ -138,6 +154,15 @@
};
};
syscon: system-control@1c00000 {
compatible = "allwinner,sun8i-v3s-system-control",
"allwinner,sun8i-h3-system-control";
reg = <0x01c00000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,sun8i-v3s-tcon";
reg = <0x01c0c000 0x1000>;
@ -303,16 +328,41 @@
interrupt-controller;
#interrupt-cells = <3>;
/omit-if-no-ref/
csi1_8bit_pins: csi1-8bit-pins {
pins = "PE0", "PE2", "PE3", "PE8", "PE9",
"PE10", "PE11", "PE12", "PE13", "PE14",
"PE15";
function = "csi";
};
/omit-if-no-ref/
csi1_mclk_pin: csi1-mclk-pin {
pins = "PE1";
function = "csi";
};
i2c0_pins: i2c0-pins {
pins = "PB6", "PB7";
function = "i2c0";
};
/omit-if-no-ref/
i2c1_pe_pins: i2c1-pe-pins {
pins = "PE21", "PE22";
function = "i2c1";
};
uart0_pb_pins: uart0-pb-pins {
pins = "PB8", "PB9";
function = "uart0";
};
uart2_pins: uart2-pins {
pins = "PB0", "PB1";
function = "uart2";
};
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@ -388,6 +438,8 @@
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";
status = "disabled";
};
@ -415,6 +467,49 @@
#size-cells = <0>;
};
emac: ethernet@1c30000 {
compatible = "allwinner,sun8i-v3s-emac";
syscon = <&syscon>;
reg = <0x01c30000 0x10000>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
resets = <&ccu RST_BUS_EMAC>;
reset-names = "stmmaceth";
clocks = <&ccu CLK_BUS_EMAC>;
clock-names = "stmmaceth";
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
status = "disabled";
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
};
mdio_mux: mdio-mux {
compatible = "allwinner,sun8i-h3-mdio-mux";
#address-cells = <1>;
#size-cells = <0>;
mdio-parent-bus = <&mdio>;
/* Only one MDIO is usable at the time */
internal_mdio: mdio@1 {
compatible = "allwinner,sun8i-h3-mdio-internal";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
int_mii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
clocks = <&ccu CLK_BUS_EPHY>;
resets = <&ccu RST_BUS_EPHY>;
};
};
};
};
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
@ -429,6 +524,18 @@
#size-cells = <0>;
};
csi1: camera@1cb4000 {
compatible = "allwinner,sun8i-v3s-csi";
reg = <0x01cb4000 0x3000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CSI>,
<&ccu CLK_CSI1_SCLK>,
<&ccu CLK_DRAM_CSI>;
clock-names = "bus", "mod", "ram";
resets = <&ccu RST_BUS_CSI>;
status = "disabled";
};
gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,