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drm/i915/dsb: hide struct intel_dsb better

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struct intel_dsb can be an opaque type, hidden in intel_dsb.c. Make it
so. Reduce related includes while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908165702.973854-1-jani.nikula@intel.com
This commit is contained in:
Jani Nikula 2022-09-08 19:57:02 +03:00
parent f2c9df1010
commit e2a5c05de6
5 changed files with 32 additions and 29 deletions
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1
drivers/gpu/drm/i915/display/intel_color.c
View File

@ -26,6 +26,7 @@
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dpll.h"
#include "intel_dsb.h"
#include "vlv_dsi_pll.h"
struct intel_color_funcs {

1
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -92,6 +92,7 @@
#include "intel_dmc.h"
#include "intel_dp_link_training.h"
#include "intel_dpt.h"
#include "intel_dsb.h"
#include "intel_fbc.h"
#include "intel_fbdev.h"
#include "intel_fdi.h"

30
drivers/gpu/drm/i915/display/intel_dsb.c
View File

@ -9,6 +9,36 @@
#include "i915_drv.h"
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dsb.h"
struct i915_vma;
enum dsb_id {
INVALID_DSB = -1,
DSB1,
DSB2,
DSB3,
MAX_DSB_PER_PIPE
};
struct intel_dsb {
enum dsb_id id;
u32 *cmd_buf;
struct i915_vma *vma;
/*
* free_pos will point the first free entry position
* and help in calculating tail of command buffer.
*/
int free_pos;
/*
* ins_start_offset will help to store start address of the dsb
* instuction and help in identifying the batch of auto-increment
* register.
*/
u32 ins_start_offset;
};
#define DSB_BUF_SIZE (2 * PAGE_SIZE)

28
drivers/gpu/drm/i915/display/intel_dsb.h
View File

@ -11,34 +11,6 @@
#include "i915_reg_defs.h"
struct intel_crtc_state;
struct i915_vma;
enum dsb_id {
INVALID_DSB = -1,
DSB1,
DSB2,
DSB3,
MAX_DSB_PER_PIPE
};
struct intel_dsb {
enum dsb_id id;
u32 *cmd_buf;
struct i915_vma *vma;
/*
* free_pos will point the first free entry position
* and help in calculating tail of command buffer.
*/
int free_pos;
/*
* ins_start_offset will help to store start address of the dsb
* instuction and help in identifying the batch of auto-increment
* register.
*/
u32 ins_start_offset;
};
void intel_dsb_prepare(struct intel_crtc_state *crtc_state);
void intel_dsb_cleanup(struct intel_crtc_state *crtc_state);

1
drivers/gpu/drm/i915/i915_drv.h
View File

@ -38,7 +38,6 @@
#include "display/intel_display.h"
#include "display/intel_display_core.h"
#include "display/intel_dsb.h"
#include "gem/i915_gem_context_types.h"
#include "gem/i915_gem_lmem.h"