drm/xe: Add explicit padding to uAPI definition
Pad the uAPI definition so that it would align identically between 64-bit and 32-bit uarch, so consumers using this header will work correctly from 32-bit compat userspace on a 64-bit kernel. Do it in a minimally invasive way, so that 64-bit userspace will still work with the previous header, and so that no fields suddenly change sizes. Originally inspired by mlankhorst. Signed-off-by: Christopher Snowhill <kode54@gmail.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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@ -91,7 +91,7 @@ struct xe_user_extension {
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*/
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*/
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__u32 name;
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__u32 name;
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/**
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/**
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* @flags: MBZ
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* @pad: MBZ
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*
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*
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* All undefined bits must be zero.
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* All undefined bits must be zero.
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*/
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*/
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@ -291,6 +291,9 @@ struct drm_xe_gem_create {
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*/
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*/
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__u32 handle;
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__u32 handle;
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/** @pad: MBZ */
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__u32 pad;
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/** @reserved: Reserved */
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/** @reserved: Reserved */
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__u64 reserved[2];
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__u64 reserved[2];
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};
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};
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@ -335,6 +338,9 @@ struct drm_xe_ext_vm_set_property {
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#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
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#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
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__u32 property;
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__u32 property;
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/** @pad: MBZ */
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__u32 pad;
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/** @value: property value */
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/** @value: property value */
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__u64 value;
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__u64 value;
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@ -379,6 +385,9 @@ struct drm_xe_vm_bind_op {
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*/
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*/
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__u32 obj;
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__u32 obj;
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/** @pad: MBZ */
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__u32 pad;
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union {
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union {
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/**
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/**
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* @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
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* @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
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@ -469,6 +478,9 @@ struct drm_xe_vm_bind {
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/** @num_binds: number of binds in this IOCTL */
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/** @num_binds: number of binds in this IOCTL */
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__u32 num_binds;
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__u32 num_binds;
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/** @pad: MBZ */
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__u32 pad;
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union {
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union {
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/** @bind: used if num_binds == 1 */
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/** @bind: used if num_binds == 1 */
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struct drm_xe_vm_bind_op bind;
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struct drm_xe_vm_bind_op bind;
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@ -482,6 +494,9 @@ struct drm_xe_vm_bind {
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/** @num_syncs: amount of syncs to wait on */
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/** @num_syncs: amount of syncs to wait on */
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__u32 num_syncs;
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__u32 num_syncs;
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/** @pad2: MBZ */
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__u32 pad2;
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/** @syncs: pointer to struct drm_xe_sync array */
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/** @syncs: pointer to struct drm_xe_sync array */
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__u64 syncs;
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__u64 syncs;
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@ -497,6 +512,9 @@ struct drm_xe_ext_engine_set_property {
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/** @property: property to set */
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/** @property: property to set */
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__u32 property;
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__u32 property;
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/** @pad: MBZ */
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__u32 pad;
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/** @value: property value */
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/** @value: property value */
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__u64 value;
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__u64 value;
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};
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};
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@ -612,6 +630,9 @@ struct drm_xe_sync {
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#define DRM_XE_SYNC_USER_FENCE 0x3
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#define DRM_XE_SYNC_USER_FENCE 0x3
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#define DRM_XE_SYNC_SIGNAL 0x10
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#define DRM_XE_SYNC_SIGNAL 0x10
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/** @pad: MBZ */
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__u32 pad;
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union {
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union {
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__u32 handle;
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__u32 handle;
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/**
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/**
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@ -656,6 +677,9 @@ struct drm_xe_exec {
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*/
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*/
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__u16 num_batch_buffer;
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__u16 num_batch_buffer;
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/** @pad: MBZ */
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__u16 pad[3];
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/** @reserved: Reserved */
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/** @reserved: Reserved */
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__u64 reserved[2];
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__u64 reserved[2];
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};
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};
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@ -718,6 +742,8 @@ struct drm_xe_wait_user_fence {
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#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
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#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
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#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
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#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
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__u16 flags;
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__u16 flags;
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/** @pad: MBZ */
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__u32 pad;
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/** @value: compare value */
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/** @value: compare value */
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__u64 value;
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__u64 value;
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/** @mask: comparison mask */
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/** @mask: comparison mask */
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@ -750,6 +776,9 @@ struct drm_xe_vm_madvise {
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/** @vm_id: The ID VM in which the VMA exists */
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/** @vm_id: The ID VM in which the VMA exists */
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__u32 vm_id;
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__u32 vm_id;
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/** @pad: MBZ */
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__u32 pad;
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/** @range: Number of bytes in the VMA */
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/** @range: Number of bytes in the VMA */
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__u64 range;
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__u64 range;
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@ -794,6 +823,9 @@ struct drm_xe_vm_madvise {
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/** @property: property to set */
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/** @property: property to set */
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__u32 property;
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__u32 property;
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/** @pad2: MBZ */
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__u32 pad2;
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/** @value: property value */
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/** @value: property value */
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__u64 value;
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__u64 value;
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