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drm/i915/aml: Introducing Amber Lake platform

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Amber Lake uses the same gen graphics as Kaby Lake, including a id
that were previously marked as reserved on Kaby Lake, but that
now is moved to AML page.

So, let's just move it to AML macro that will feed into KBL macro
just to keep it better organized to make easier future code review
but it will be handled as a KBL.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180614233720.30517-2-jose.souza@intel.com
This commit is contained in:
José Roberto de Souza 2018-06-14 16:37:20 -07:00 committed by Rodrigo Vivi
parent b9be78531d
commit e364672477
2 changed files with 8 additions and 2 deletions
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1
drivers/gpu/drm/i915/i915_pci.c
View File

@ -657,6 +657,7 @@ static const struct pci_device_id pciidlist[] = {
INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info), INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),
INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info), INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info), INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),
INTEL_AML_GT2_IDS(&intel_kabylake_gt2_info),
INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info), INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),

9
include/drm/i915_pciids.h
View File

@ -349,7 +349,6 @@
#define INTEL_KBL_GT2_IDS(info) \ #define INTEL_KBL_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \ INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \ INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \ INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \ INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \
@ -365,11 +364,17 @@
#define INTEL_KBL_GT4_IDS(info) \ #define INTEL_KBL_GT4_IDS(info) \
INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */ INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
/* AML/KBL Y GT2 */
#define INTEL_AML_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
#define INTEL_KBL_IDS(info) \ #define INTEL_KBL_IDS(info) \
INTEL_KBL_GT1_IDS(info), \ INTEL_KBL_GT1_IDS(info), \
INTEL_KBL_GT2_IDS(info), \ INTEL_KBL_GT2_IDS(info), \
INTEL_KBL_GT3_IDS(info), \ INTEL_KBL_GT3_IDS(info), \
INTEL_KBL_GT4_IDS(info) INTEL_KBL_GT4_IDS(info), \
INTEL_AML_GT2_IDS(info)
/* CFL S */ /* CFL S */
#define INTEL_CFL_S_GT1_IDS(info) \ #define INTEL_CFL_S_GT1_IDS(info) \