kvm: arm64: handle single-step of hyp emulated mmio instructions
There is a fast-path of MMIO emulation inside hyp mode. The handling of single-step is broadly the same as kvm_arm_handle_step_debug() except we just setup ESR/HSR so handle_exit() does the correct thing as we exit. For the case of an emulated illegal access causing an SError we will exit via the ARM_EXCEPTION_EL1_SERROR path in handle_exit(). We behave as we would during a real SError and clear the DBG_SPSR_SS bit for the emulated instruction. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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@ -22,6 +22,7 @@
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_hyp.h>
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#include <asm/fpsimd.h>
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#include <asm/debug-monitors.h>
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static bool __hyp_text __fpsimd_enabled_nvhe(void)
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{
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@ -269,7 +270,11 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu)
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return true;
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}
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static void __hyp_text __skip_instr(struct kvm_vcpu *vcpu)
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/* Skip an instruction which has been emulated. Returns true if
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* execution can continue or false if we need to exit hyp mode because
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* single-step was in effect.
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*/
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static bool __hyp_text __skip_instr(struct kvm_vcpu *vcpu)
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{
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*vcpu_pc(vcpu) = read_sysreg_el2(elr);
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@ -282,6 +287,14 @@ static void __hyp_text __skip_instr(struct kvm_vcpu *vcpu)
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}
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write_sysreg_el2(*vcpu_pc(vcpu), elr);
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if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
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vcpu->arch.fault.esr_el2 =
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(ESR_ELx_EC_SOFTSTP_LOW << ESR_ELx_EC_SHIFT) | 0x22;
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return false;
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} else {
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return true;
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}
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}
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int __hyp_text __kvm_vcpu_run(struct kvm_vcpu *vcpu)
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@ -342,13 +355,21 @@ again:
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int ret = __vgic_v2_perform_cpuif_access(vcpu);
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if (ret == 1) {
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__skip_instr(vcpu);
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if (__skip_instr(vcpu))
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goto again;
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else
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exit_code = ARM_EXCEPTION_TRAP;
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}
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if (ret == -1) {
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/* Promote an illegal access to an SError */
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__skip_instr(vcpu);
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/* Promote an illegal access to an
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* SError. If we would be returning
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* due to single-step clear the SS
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* bit so handle_exit knows what to
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* do after dealing with the error.
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*/
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if (!__skip_instr(vcpu))
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*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;
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exit_code = ARM_EXCEPTION_EL1_SERROR;
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}
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@ -363,8 +384,10 @@ again:
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int ret = __vgic_v3_perform_cpuif_access(vcpu);
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if (ret == 1) {
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__skip_instr(vcpu);
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if (__skip_instr(vcpu))
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goto again;
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else
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exit_code = ARM_EXCEPTION_TRAP;
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}
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/* 0 falls through to be handled out of EL2 */
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