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Split omap3 core padconf area into two as some of the registers in

Browse Source 
the padconf area are not accessible and used for other devices.
 Also fix the interrupt number for omap2 RNG, and add basic support
 for sbc-3xxx with cm-t3730.
 
 Note that the minor merge conflicts for omap_hwmod_2xxx_ipblock_data.c
 can be solved by just dropping the legacy hwmod data for interrupts
 for v3.14.
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Merge tag 'omap-for-v3.14/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/boards

Split omap3 core padconf area into two as some of the registers in
the padconf area are not accessible and used for other devices.
Also fix the interrupt number for omap2 RNG, and add basic support
for sbc-3xxx with cm-t3730.

Note that the minor merge conflicts for omap_hwmod_2xxx_ipblock_data.c
can be solved by just dropping the legacy hwmod data for interrupts
for v3.14.

* tag 'omap-for-v3.14/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: OMAP2: fix interrupt number for rng
  ARM: dts: Split omap3 pinmux core device
  ARM: dts: Add omap specific pinctrl defines to use padconf addresses
  ARM: dts: Add support for sbc-3xxx with cm-t3730

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-01-23 08:51:18 -08:00
commit e41006c22e
17 changed files with 450 additions and 67 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/Makefile
View File

@ -180,6 +180,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap2420-n810-wimax.dtb \
omap3430-sdp.dtb \
omap3-beagle.dtb \
omap3-cm-t3730.dtb \
omap3-sbc-t3730.dtb \
omap3-devkit8000.dtb \
omap3-beagle-xm.dtb \
omap3-evm.dtb \

2
arch/arm/boot/dts/omap2.dtsi
View File

@ -145,7 +145,7 @@
compatible = "ti,omap2-rng";
ti,hwmods = "rng";
reg = <0x480a0000 0x50>;
interrupts = <36>;
interrupts = <52>;
};
sham: sham@480a4000 {

40
arch/arm/boot/dts/omap3-beagle-xm.dts
View File

@ -99,7 +99,7 @@
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&hsusbb2_pins
&hsusb2_pins
>;
uart3_pins: pinmux_uart3_pins {
@ -109,20 +109,32 @@
>;
};
hsusbb2_pins: pinmux_hsusbb2_pins {
hsusb2_pins: pinmux_hsusb2_pins {
pinctrl-single,pins = <
0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
>;
};
};
&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <
&hsusb2_2_pins
>;
hsusb2_2_pins: pinmux_hsusb2_2_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
>;
};
};

40
arch/arm/boot/dts/omap3-beagle.dts
View File

@ -93,23 +93,17 @@
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&hsusbb2_pins
&hsusb2_pins
>;
hsusbb2_pins: pinmux_hsusbb2_pins {
hsusb2_pins: pinmux_hsusb2_pins {
pinctrl-single,pins = <
0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
>;
};
@ -121,6 +115,24 @@
};
};
&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <
&hsusb2_2_pins
>;
hsusb2_2_pins: pinmux_hsusb2_2_pins {
pinctrl-single,pins = <
OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
>;
};
};
&i2c1 {
clock-frequency = <2600000>;

104
arch/arm/boot/dts/omap3-cm-t3730.dts Normal file
View File

@ -0,0 +1,104 @@
/*
* Support for CompuLab CM-T3730
*/
/dts-v1/;
#include "omap36xx.dtsi"
#include "omap3-cm-t3x30.dtsi"
/ {
model = "CompuLab CM-T3730";
compatible = "compulab,omap3-cm-t3730", "ti,omap36xx", "ti,omap3";
wl12xx_vmmc2: wl12xx_vmmc2 {
compatible = "regulator-fixed";
regulator-name = "vw1271";
pinctrl-names = "default";
pinctrl-0 = <&wl12xx_gpio>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>; /* gpio73 */
startup-delay-us = <20000>;
enable-active-high;
};
wl12xx_vaux2: wl12xx_vaux2 {
compatible = "regulator-fixed";
regulator-name = "vwl1271_vaux2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vaux2>;
};
};
&omap3_pmx_core {
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
>;
};
mmc2_pins: pinmux_mmc2_pins {
pinctrl-single,pins = <
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
>;
};
smsc1_pins: pinmux_smsc1_pins {
pinctrl-single,pins = <
0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
0x16a (PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>;
};
wl12xx_gpio: pinmux_wl12xx_gpio {
pinctrl-single,pins = <
0xb2 (PIN_OUTPUT | MUX_MODE4) /* dss_data3.gpio_73 */
0x134 (PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 */
>;
};
};
&mmc1 {
vmmc-supply = <&vmmc1>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&wl12xx_vmmc2>;
vmmc_aux-supply = <&wl12xx_vaux2>;
non-removable;
bus-width = <4>;
cap-power-off-card;
};
&smsc1 {
pinctrl-names = "default";
pinctrl-0 = <&smsc1_pins>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};

95
arch/arm/boot/dts/omap3-cm-t3x30.dtsi Normal file
View File

@ -0,0 +1,95 @@
/*
* Common support for CompuLab CM-T3530 and CM-T3730
*/
/ {
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
cpus {
cpu@0 {
cpu0-supply = <&vcc>;
};
};
leds {
compatible = "gpio-leds";
ledb {
label = "cm-t35:green";
gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
linux,default-trigger = "heartbeat";
};
};
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {
compatible = "regulator-fixed";
regulator-name = "vdd33a";
regulator-always-on;
};
};
&gpmc {
ranges = <5 0 0x2c000000 0x01000000>;
smsc1: ethernet@5,0 {
compatible = "smsc,lan9221", "smsc,lan9115";
interrupt-parent = <&gpio6>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
reg = <5 0 0xff>;
bank-width = <2>;
gpmc,mux-add-data;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <186>;
gpmc,cs-wr-off-ns = <186>;
gpmc,adv-on-ns = <12>;
gpmc,adv-rd-off-ns = <48>;
gpmc,adv-wr-off-ns = <48>;
gpmc,oe-on-ns = <54>;
gpmc,oe-off-ns = <168>;
gpmc,we-on-ns = <54>;
gpmc,we-off-ns = <168>;
gpmc,rd-cycle-ns = <186>;
gpmc,wr-cycle-ns = <186>;
gpmc,access-ns = <114>;
gpmc,page-burst-access-ns = <6>;
gpmc,bus-turnaround-ns = <12>;
gpmc,cycle2cycle-delay-ns = <18>;
gpmc,wr-data-mux-bus-ns = <90>;
gpmc,wr-access-ns = <186>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-diffcsen;
vddvario-supply = <&vddvario>;
vdd33a-supply = <&vdd33a>;
reg-io-width = <4>;
smsc,save-mac-address;
};
};
&i2c1 {
clock-frequency = <400000>;
twl: twl@48 {
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
};
};
#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
&i2c3 {
clock-frequency = <400000>;
};
&twl_gpio {
ti,use-leds;
};

2
arch/arm/boot/dts/omap3-igep.dtsi
View File

@ -133,8 +133,6 @@
0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
>;
};
leds_pins: pinmux_leds_pins { };
};
&i2c1 {

52
arch/arm/boot/dts/omap3-igep0020.dts
View File

@ -66,28 +66,10 @@
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&hsusbb1_pins
&tfp410_pins
&dss_pins
>;
hsusbb1_pins: pinmux_hsusbb1_pins {
pinctrl-single,pins = <
0x5aa (PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
0x5a8 (PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */
0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */
0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */
0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */
0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */
0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */
0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */
0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */
0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */
0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
>;
};
tfp410_pins: tfp410_dvi_pins {
pinctrl-single,pins = <
0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
@ -128,12 +110,36 @@
};
};
&leds_pins {
pinctrl-single,pins = <
0x5c4 (PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
0x5c6 (PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
0x5c8 (PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <
&hsusbb1_pins
>;
hsusbb1_pins: pinmux_hsusbb1_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */
OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */
OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */
OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */
OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */
OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */
OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */
OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */
OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */
OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
>;
};
leds_pins: pinmux_leds_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
>;
};
};
&i2c3 {

10
arch/arm/boot/dts/omap3-igep0030.dts
View File

@ -46,10 +46,12 @@
};
};
&leds_pins {
pinctrl-single,pins = <
0x5b0 (PIN_OUTPUT | MUX_MODE4) /* etk_d2.gpio_16 */
>;
&omap3_pmx_core2 {
leds_pins: pinmux_leds_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4) /* etk_d2.gpio_16 */
>;
};
};
&gpmc {

40
arch/arm/boot/dts/omap3-sb-t35.dtsi Normal file
View File

@ -0,0 +1,40 @@
/*
* Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
*/
&gpmc {
ranges = <4 0 0x2d000000 0x01000000>;
smsc2: ethernet@4,0 {
compatible = "smsc,lan9221", "smsc,lan9115";
interrupt-parent = <&gpio3>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
reg = <4 0 0xff>;
bank-width = <2>;
gpmc,mux-add-data;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <186>;
gpmc,cs-wr-off-ns = <186>;
gpmc,adv-on-ns = <12>;
gpmc,adv-rd-off-ns = <48>;
gpmc,adv-wr-off-ns = <48>;
gpmc,oe-on-ns = <54>;
gpmc,oe-off-ns = <168>;
gpmc,we-on-ns = <54>;
gpmc,we-off-ns = <168>;
gpmc,rd-cycle-ns = <186>;
gpmc,wr-cycle-ns = <186>;
gpmc,access-ns = <114>;
gpmc,page-burst-access-ns = <6>;
gpmc,bus-turnaround-ns = <12>;
gpmc,cycle2cycle-delay-ns = <18>;
gpmc,wr-data-mux-bus-ns = <90>;
gpmc,wr-access-ns = <186>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-diffcsen;
vddvario-supply = <&vddvario>;
vdd33a-supply = <&vdd33a>;
reg-io-width = <4>;
smsc,save-mac-address;
};
};

30
arch/arm/boot/dts/omap3-sbc-t3730.dts Normal file
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@ -0,0 +1,30 @@
/*
* Suppport for CompuLab SBC-T3730 with CM-T3730
*/
#include "omap3-cm-t3730.dts"
#include "omap3-sb-t35.dtsi"
/ {
model = "CompuLab SBC-T3730 with CM-T3730";
compatible = "compulab,omap3-sbc-t3730", "compulab,omap3-cm-t3730", "ti,omap36xx", "ti,omap3";
};
&gpmc {
ranges = <5 0 0x2c000000 0x01000000>,
<4 0 0x2d000000 0x01000000>;
};
&smsc2 {
pinctrl-names = "default";
pinctrl-0 = <&smsc2_pins>;
};
&omap3_pmx_core {
smsc2_pins: pinmux_smsc2_pins {
pinctrl-single,pins = <
0x86 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs4.gpmc_ncs4 */
0xa2 (PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_wait3.gpio_65 */
>;
};
};

23
arch/arm/boot/dts/omap3-zoom3.dts
View File

@ -80,13 +80,8 @@
mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
0x168 (PIN_INPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 WLAN IRQ */
0x1a0 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
0x5a8 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
0x5b4 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
0x5b6 (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
0x5b8 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
0x5b2 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 WLAN IRQ */
OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
>;
};
@ -125,6 +120,18 @@
};
};
&omap3_pmx_core2 {
mmc3_2_pins: pinmux_mmc3_2_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
OMAP3630_CORE2_IOPAD(0x25e6, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
>;
};
};
&omap3_pmx_wkup {
wlan_host_wkup: pinmux_wlan_host_wkup_pins {
pinctrl-single,pins = <
@ -187,7 +194,7 @@
bus-width = <4>;
cap-power-off-card;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins>;
pinctrl-0 = <&mmc3_pins &mmc3_2_pins>;
};
&uart1 {

2
arch/arm/boot/dts/omap3.dtsi
View File

@ -117,7 +117,7 @@
omap3_pmx_core: pinmux@48002030 {
compatible = "ti,omap3-padconf", "pinctrl-single";
reg = <0x48002030 0x05cc>;
reg = <0x48002030 0x0238>;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;

13
arch/arm/boot/dts/omap34xx.dtsi
View File

@ -25,4 +25,17 @@
clock-latency = <300000>; /* From legacy driver */
};
};
ocp {
omap3_pmx_core2: pinmux@480025d8 {
compatible = "ti,omap3-padconf", "pinctrl-single";
reg = <0x480025d8 0x24>;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xff1f>;
};
};
};

11
arch/arm/boot/dts/omap36xx.dtsi
View File

@ -38,5 +38,16 @@
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};
omap3_pmx_core2: pinmux@480025a0 {
compatible = "ti,omap3-padconf", "pinctrl-single";
reg = <0x480025a0 0x5c>;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xff1f>;
};
};
};

31
arch/arm/mach-omap2/pdata-quirks.c
View File

@ -92,6 +92,33 @@ static void __init hsmmc2_internal_input_clk(void)
omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1);
}
static int omap3_sbc_t3730_twl_callback(struct device *dev,
unsigned gpio,
unsigned ngpio)
{
int res;
res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
"wlan rst");
if (res)
return res;
gpio_export(gpio, 0);
return 0;
}
static void __init omap3_sbc_t3730_twl_init(void)
{
twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback;
}
static void __init omap3_sbc_t3730_legacy_init(void)
{
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 136);
omap_ads7846_init(1, 57, 0, NULL);
}
static void __init omap3_igep0020_legacy_init(void)
{
omap3_igep2_display_init_of();
@ -199,6 +226,9 @@ static struct pdata_init auxdata_quirks[] __initdata = {
{ "nokia,n800", omap2420_n8x0_legacy_init, },
{ "nokia,n810", omap2420_n8x0_legacy_init, },
{ "nokia,n810-wimax", omap2420_n8x0_legacy_init, },
#endif
#ifdef CONFIG_ARCH_OMAP3
{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_twl_init, },
#endif
{ /* sentinel */ },
};
@ -228,6 +258,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
*/
static struct pdata_init pdata_quirks[] __initdata = {
#ifdef CONFIG_ARCH_OMAP3
{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
{ "nokia,omap3-n900", hsmmc2_internal_input_clk, },
{ "nokia,omap3-n9", hsmmc2_internal_input_clk, },
{ "nokia,omap3-n950", hsmmc2_internal_input_clk, },

20
include/dt-bindings/pinctrl/omap.h
View File

@ -49,5 +49,25 @@
#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
/*
* Macros to allow using the absolute physical address instead of the
* padconf registers instead of the offset from padconf base.
*/
#define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
#define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val)
#define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
#define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
#define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val)
#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
#define OMAP4_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0040) (val)
#define OMAP4_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0xe040) (val)
#define AM4372_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
#define OMAP5_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2840) (val)
#define OMAP5_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0xc840) (val)
#define DRA7XX_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
#endif