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xhci: fix write to USB3_PSSEN and XUSB2PRM pci config registers

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The function pci_write_config_dword() sets the appropriate byteordering
internally so the value argument should not be converted to little-endian.
This bug was found by sparse.

This patch is not suitable for stable.  Since cpu_to_lei32 is a no-op on
little endian systems, this bug would only affect big endian Intel
systems with the EHCI to xHCI port switchover, which are non-existent,
AFAIK.

Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
This commit is contained in:
Xenia Ragiadakou 2013-09-20 19:45:53 +03:00 committed by Sarah Sharp
parent 455f589252
commit e459933967
1 changed files with 2 additions and 2 deletions
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4
drivers/usb/host/pci-quirks.c
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@ -799,7 +799,7 @@ void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev)
* switchable ports. * switchable ports.
*/ */
pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
cpu_to_le32(ports_available)); ports_available);
pci_read_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, pci_read_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
&ports_available); &ports_available);
@ -821,7 +821,7 @@ void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev)
* host. * host.
*/ */
pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
cpu_to_le32(ports_available)); ports_available);
pci_read_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, pci_read_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
&ports_available); &ports_available);