KVM: arm64: Treat PMCR_EL1.LC as RES1 on asymmetric systems
[ Upstream commit f3c6efc72f3b20ec23566e768979802f0a398f04 ] KVM does not support AArch32 on asymmetric systems. To that end, enforce AArch64-only behavior on PMCR_EL1.LC when on an asymmetric system. Fixes: 2122a833316f ("arm64: Allow mismatched 32-bit EL0 support") Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220816192554.1455559-2-oliver.upton@linux.dev Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -838,6 +838,10 @@ bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu);
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(system_supports_mte() && \
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test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags))
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#define kvm_supports_32bit_el0() \
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(system_supports_32bit_el0() && \
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!static_branch_unlikely(&arm64_mismatched_32bit_el0))
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int kvm_trng_call(struct kvm_vcpu *vcpu);
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#ifdef CONFIG_KVM
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extern phys_addr_t hyp_mem_base;
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@ -751,8 +751,7 @@ static bool vcpu_mode_is_bad_32bit(struct kvm_vcpu *vcpu)
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if (likely(!vcpu_mode_is_32bit(vcpu)))
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return false;
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return !system_supports_32bit_el0() ||
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static_branch_unlikely(&arm64_mismatched_32bit_el0);
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return !kvm_supports_32bit_el0();
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}
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/**
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@ -692,7 +692,7 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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*/
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val = ((pmcr & ~ARMV8_PMU_PMCR_MASK)
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| (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E);
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if (!system_supports_32bit_el0())
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if (!kvm_supports_32bit_el0())
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val |= ARMV8_PMU_PMCR_LC;
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__vcpu_sys_reg(vcpu, r->reg) = val;
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}
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@ -741,7 +741,7 @@ static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
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val = __vcpu_sys_reg(vcpu, PMCR_EL0);
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val &= ~ARMV8_PMU_PMCR_MASK;
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val |= p->regval & ARMV8_PMU_PMCR_MASK;
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if (!system_supports_32bit_el0())
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if (!kvm_supports_32bit_el0())
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val |= ARMV8_PMU_PMCR_LC;
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__vcpu_sys_reg(vcpu, PMCR_EL0) = val;
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kvm_pmu_handle_pmcr(vcpu, val);
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