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drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL

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The DPT/DSC bpp limit should be accounted for on MTL platforms as well,
do so.

Bspec: 49259

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240416221010.376865-6-imre.deak@intel.com
This commit is contained in:
Imre Deak 2024-04-17 01:10:04 +03:00
parent fd13841d8b
commit e54cc6deec
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/display/intel_dp_mst.c
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@ -56,7 +56,7 @@ static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp
struct intel_crtc_state *crtc_state,
bool dsc)
{
if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) < 14 && dsc) {
if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) < 20 && dsc) {
int output_bpp = bpp;
int symbol_clock = intel_dp_link_symbol_clock(crtc_state->port_clock);
/*