drm/amd/display: Update DCN303 SR Exit Latency

[Why]
This update was made for DCN30, but it is needed for DCN303 as well

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Joshua Aberback 2021-04-06 17:21:50 -04:00 committed by Alex Deucher
parent fa5d21edbb
commit e5fd073fd4

View File

@ -146,7 +146,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_03_soc = {
.min_dcfclk = 500.0, /* TODO: set this to actual min DCFCLK */
.num_states = 1,
.sr_exit_time_us = 12,
.sr_exit_time_us = 15.5,
.sr_enter_plus_exit_time_us = 20,
.urgent_latency_us = 4.0,
.urgent_latency_pixel_data_only_us = 4.0,