drm/amd/display: Update DCN303 SR Exit Latency
[Why] This update was made for DCN30, but it is needed for DCN303 as well Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -146,7 +146,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_03_soc = {
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.min_dcfclk = 500.0, /* TODO: set this to actual min DCFCLK */
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.num_states = 1,
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.sr_exit_time_us = 12,
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.sr_exit_time_us = 15.5,
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.sr_enter_plus_exit_time_us = 20,
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.urgent_latency_us = 4.0,
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.urgent_latency_pixel_data_only_us = 4.0,
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