riscv: dts: starfive: jh7110: add the node and pins configuration for tdm

Add the tdm controller node and pins configuration of tdm for the
StarFive JH7110 SoC.

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Walker Chen 2023-07-24 14:51:58 +08:00 committed by Conor Dooley
parent ac73c09716
commit e7c304c034
2 changed files with 61 additions and 1 deletions

View File

@ -315,6 +315,46 @@
slew-rate = <0>;
};
};
tdm_pins: tdm-0 {
tx-pins {
pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
GPOEN_ENABLE,
GPI_NONE)>;
bias-pull-up;
drive-strength = <2>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
rx-pins {
pinmux = <GPIOMUX(61, GPOUT_HIGH,
GPOEN_DISABLE,
GPI_SYS_TDM_RXD)>;
input-enable;
};
sync-pins {
pinmux = <GPIOMUX(63, GPOUT_HIGH,
GPOEN_DISABLE,
GPI_SYS_TDM_SYNC)>;
input-enable;
};
pcmclk-pins {
pinmux = <GPIOMUX(38, GPOUT_HIGH,
GPOEN_DISABLE,
GPI_SYS_TDM_CLK)>;
input-enable;
};
};
};
&tdm {
pinctrl-names = "default";
pinctrl-0 = <&tdm_pins>;
status = "okay";
};
&uart0 {
@ -325,7 +365,6 @@
&usb0 {
dr_mode = "peripheral";
status = "okay";
};
&U74_1 {

View File

@ -491,6 +491,27 @@
status = "disabled";
};
tdm: tdm@10090000 {
compatible = "starfive,jh7110-tdm";
reg = <0x0 0x10090000 0x0 0x1000>;
clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
<&syscrg JH7110_SYSCLK_TDM_APB>,
<&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
<&syscrg JH7110_SYSCLK_TDM_TDM>,
<&syscrg JH7110_SYSCLK_MCLK_INNER>,
<&tdm_ext>;
clock-names = "tdm_ahb", "tdm_apb",
"tdm_internal", "tdm",
"mclk_inner", "tdm_ext";
resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
<&syscrg JH7110_SYSRST_TDM_APB>,
<&syscrg JH7110_SYSRST_TDM_CORE>;
dmas = <&dma 20>, <&dma 21>;
dma-names = "rx","tx";
#sound-dai-cells = <0>;
status = "disabled";
};
usb0: usb@10100000 {
compatible = "starfive,jh7110-usb";
ranges = <0x0 0x0 0x10100000 0x100000>;