drivers/rtc/rtc-pl031.c: fix the missing operation on enable
The RTC control register should be enabled in the process of initializing. Without this patch, I failed to enable RTC in Hisilicon Hi3620 SoC. The register mapping section in RTC is always read as zero. So I doubt that ST guys may already enable this register in bootloader. So they won't meet this issue. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -44,6 +44,7 @@
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#define RTC_YMR 0x34 /* Year match register */
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#define RTC_YLR 0x38 /* Year data load register */
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#define RTC_CR_EN (1 << 0) /* counter enable bit */
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#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
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#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
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@ -320,7 +321,7 @@ static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
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struct pl031_local *ldata;
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struct pl031_vendor_data *vendor = id->data;
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struct rtc_class_ops *ops = &vendor->ops;
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unsigned long time;
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unsigned long time, data;
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ret = amba_request_regions(adev, NULL);
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if (ret)
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@ -345,10 +346,11 @@ static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
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dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
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dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));
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data = readl(ldata->base + RTC_CR);
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/* Enable the clockwatch on ST Variants */
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if (vendor->clockwatch)
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writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN,
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ldata->base + RTC_CR);
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data |= RTC_CR_CWEN;
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writel(data | RTC_CR_EN, ldata->base + RTC_CR);
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/*
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* On ST PL031 variants, the RTC reset value does not provide correct
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