coresight: etb10: adding operation mode for sink->enable()
Adding an operation mode to the sink->enable() API in order to prevent simultaneous access from different callers. TPIU and TMC won't be supplemented with the AUX area API immediately and as such ignore the new mode. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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27b10da8ff
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@ -73,9 +73,9 @@
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* @miscdev: specifics to handle "/dev/xyz.etb" entry.
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* @spinlock: only one at a time pls.
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* @reading: synchronise user space access to etb buffer.
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* @mode: this ETB is being used.
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* @buf: area of memory where ETB buffer content gets sent.
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* @buffer_depth: size of @buf.
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* @enable: this ETB is being used.
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* @trigger_cntr: amount of words to store after a trigger.
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*/
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struct etb_drvdata {
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@ -86,9 +86,9 @@ struct etb_drvdata {
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struct miscdevice miscdev;
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spinlock_t spinlock;
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local_t reading;
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local_t mode;
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u8 *buf;
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u32 buffer_depth;
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bool enable;
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u32 trigger_cntr;
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};
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@ -133,16 +133,31 @@ static void etb_enable_hw(struct etb_drvdata *drvdata)
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CS_LOCK(drvdata->base);
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}
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static int etb_enable(struct coresight_device *csdev)
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static int etb_enable(struct coresight_device *csdev, u32 mode)
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{
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struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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u32 val;
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unsigned long flags;
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struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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val = local_cmpxchg(&drvdata->mode,
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CS_MODE_DISABLED, mode);
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/*
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* When accessing from Perf, a HW buffer can be handled
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* by a single trace entity. In sysFS mode many tracers
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* can be logging to the same HW buffer.
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*/
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if (val == CS_MODE_PERF)
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return -EBUSY;
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/* Nothing to do, the tracer is already enabled. */
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if (val == CS_MODE_SYSFS)
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goto out;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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etb_enable_hw(drvdata);
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drvdata->enable = true;
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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out:
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dev_info(drvdata->dev, "ETB enabled\n");
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return 0;
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}
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@ -243,9 +258,10 @@ static void etb_disable(struct coresight_device *csdev)
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spin_lock_irqsave(&drvdata->spinlock, flags);
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etb_disable_hw(drvdata);
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etb_dump_hw(drvdata);
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drvdata->enable = false;
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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local_set(&drvdata->mode, CS_MODE_DISABLED);
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dev_info(drvdata->dev, "ETB disabled\n");
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}
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@ -263,7 +279,7 @@ static void etb_dump(struct etb_drvdata *drvdata)
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unsigned long flags;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->enable) {
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if (local_read(&drvdata->mode) == CS_MODE_SYSFS) {
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etb_disable_hw(drvdata);
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etb_dump_hw(drvdata);
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etb_enable_hw(drvdata);
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@ -62,7 +62,7 @@ static inline void CS_UNLOCK(void __iomem *addr)
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}
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void coresight_disable_path(struct list_head *path);
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int coresight_enable_path(struct list_head *path);
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int coresight_enable_path(struct list_head *path, u32 mode);
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struct coresight_device *coresight_get_sink(struct list_head *path);
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struct list_head *coresight_build_path(struct coresight_device *csdev);
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void coresight_release_path(struct list_head *path);
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@ -265,7 +265,7 @@ static int tmc_enable(struct tmc_drvdata *drvdata, enum tmc_mode mode)
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return 0;
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}
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static int tmc_enable_sink(struct coresight_device *csdev)
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static int tmc_enable_sink(struct coresight_device *csdev, u32 mode)
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{
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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@ -70,7 +70,7 @@ static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
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CS_LOCK(drvdata->base);
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}
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static int tpiu_enable(struct coresight_device *csdev)
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static int tpiu_enable(struct coresight_device *csdev, u32 mode)
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{
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struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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@ -121,13 +121,13 @@ static int coresight_find_link_outport(struct coresight_device *csdev,
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return 0;
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}
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static int coresight_enable_sink(struct coresight_device *csdev)
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static int coresight_enable_sink(struct coresight_device *csdev, u32 mode)
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{
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int ret;
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if (!csdev->enable) {
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if (sink_ops(csdev)->enable) {
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ret = sink_ops(csdev)->enable(csdev);
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ret = sink_ops(csdev)->enable(csdev, mode);
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if (ret)
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return ret;
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}
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@ -283,7 +283,7 @@ void coresight_disable_path(struct list_head *path)
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}
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}
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int coresight_enable_path(struct list_head *path)
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int coresight_enable_path(struct list_head *path, u32 mode)
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{
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int ret = 0;
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@ -296,7 +296,7 @@ int coresight_enable_path(struct list_head *path)
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switch (csdev->type) {
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case CORESIGHT_DEV_TYPE_SINK:
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case CORESIGHT_DEV_TYPE_LINKSINK:
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ret = coresight_enable_sink(csdev);
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ret = coresight_enable_sink(csdev, mode);
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if (ret)
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goto err;
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break;
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@ -454,7 +454,7 @@ int coresight_enable(struct coresight_device *csdev)
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goto out;
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}
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ret = coresight_enable_path(path);
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ret = coresight_enable_path(path, CS_MODE_SYSFS);
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if (ret)
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goto err_path;
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@ -186,7 +186,7 @@ struct coresight_device {
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* @disable: disables the sink.
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*/
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struct coresight_ops_sink {
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int (*enable)(struct coresight_device *csdev);
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int (*enable)(struct coresight_device *csdev, u32 mode);
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void (*disable)(struct coresight_device *csdev);
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};
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