Merge branch 'pci/enumeration'
- Decode PCIe 64 GT/s link speed (Gustavo Pimentel) - De-duplicate Device IDs in the driver dynamic IDs list (Zhenzhong Duan) - Return u8 from pci_find_capability() and similar (Puranjay Mohan) - Return u16 from pci_find_ext_capability() and similar (Bjorn Helgaas) - Include both device and resource name in config space resources (Alexander Lobakin) - Fix ACPI companion lookup for device 0 on the root bus (Rafael J. Wysocki) * pci/enumeration: PCI/ACPI: Fix companion lookup for device 0 on the root bus PCI: Keep both device and resource name for config space remaps PCI: Return u16 from pci_find_ext_capability() and similar PCI: Return u8 from pci_find_capability() and similar PCI: Avoid duplicate IDs in driver dynamic IDs list PCI: Move pci_match_device() ahead of new_id_store() PCI: Decode PCIe 64 GT/s link speed
This commit is contained in:
Bjorn Helgaas
commit
e8722508dd
@ -1162,14 +1162,34 @@ void acpi_pci_remove_bus(struct pci_bus *bus)
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static struct acpi_device *acpi_pci_find_companion(struct device *dev)
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{
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struct pci_dev *pci_dev = to_pci_dev(dev);
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struct acpi_device *adev;
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bool check_children;
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u64 addr;
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check_children = pci_is_bridge(pci_dev);
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/* Please ref to ACPI spec for the syntax of _ADR */
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addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn);
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return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr,
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adev = acpi_find_child_device(ACPI_COMPANION(dev->parent), addr,
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check_children);
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/*
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* There may be ACPI device objects in the ACPI namespace that are
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* children of the device object representing the host bridge, but don't
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* represent PCI devices. Both _HID and _ADR may be present for them,
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* even though that is against the specification (for example, see
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* Section 6.1 of ACPI 6.3), but in many cases the _ADR returns 0 which
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* appears to indicate that they should not be taken into consideration
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* as potential companions of PCI devices on the root bus.
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*
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* To catch this special case, disregard the returned device object if
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* it has a valid _HID, addr is 0 and the PCI device at hand is on the
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* root bus.
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*/
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if (adev && adev->pnp.type.platform_id && !addr &&
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pci_is_root_bus(pci_dev->bus))
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return NULL;
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return adev;
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}
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/**
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@ -89,6 +89,79 @@ static void pci_free_dynids(struct pci_driver *drv)
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spin_unlock(&drv->dynids.lock);
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}
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/**
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* pci_match_id - See if a PCI device matches a given pci_id table
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* @ids: array of PCI device ID structures to search in
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* @dev: the PCI device structure to match against.
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*
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* Used by a driver to check whether a PCI device is in its list of
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* supported devices. Returns the matching pci_device_id structure or
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* %NULL if there is no match.
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*
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* Deprecated; don't use this as it will not catch any dynamic IDs
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* that a driver might want to check for.
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*/
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const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
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struct pci_dev *dev)
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{
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if (ids) {
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while (ids->vendor || ids->subvendor || ids->class_mask) {
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if (pci_match_one_device(ids, dev))
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return ids;
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ids++;
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL(pci_match_id);
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static const struct pci_device_id pci_device_id_any = {
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.vendor = PCI_ANY_ID,
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.device = PCI_ANY_ID,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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};
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/**
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* pci_match_device - See if a device matches a driver's list of IDs
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* @drv: the PCI driver to match against
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* @dev: the PCI device structure to match against
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*
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* Used by a driver to check whether a PCI device is in its list of
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* supported devices or in the dynids list, which may have been augmented
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* via the sysfs "new_id" file. Returns the matching pci_device_id
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* structure or %NULL if there is no match.
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*/
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static const struct pci_device_id *pci_match_device(struct pci_driver *drv,
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struct pci_dev *dev)
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{
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struct pci_dynid *dynid;
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const struct pci_device_id *found_id = NULL;
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/* When driver_override is set, only bind to the matching driver */
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if (dev->driver_override && strcmp(dev->driver_override, drv->name))
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return NULL;
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/* Look at the dynamic ids first, before the static ones */
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spin_lock(&drv->dynids.lock);
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list_for_each_entry(dynid, &drv->dynids.list, node) {
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if (pci_match_one_device(&dynid->id, dev)) {
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found_id = &dynid->id;
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break;
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}
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}
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spin_unlock(&drv->dynids.lock);
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if (!found_id)
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found_id = pci_match_id(drv->id_table, dev);
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/* driver_override will always match, send a dummy id */
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if (!found_id && dev->driver_override)
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found_id = &pci_device_id_any;
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return found_id;
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}
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/**
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* store_new_id - sysfs frontend to pci_add_dynid()
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* @driver: target device driver
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@ -125,7 +198,7 @@ static ssize_t new_id_store(struct device_driver *driver, const char *buf,
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pdev->subsystem_device = subdevice;
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pdev->class = class;
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if (pci_match_id(pdrv->id_table, pdev))
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if (pci_match_device(pdrv, pdev))
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retval = -EEXIST;
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kfree(pdev);
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@ -208,78 +281,6 @@ static struct attribute *pci_drv_attrs[] = {
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};
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ATTRIBUTE_GROUPS(pci_drv);
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/**
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* pci_match_id - See if a pci device matches a given pci_id table
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* @ids: array of PCI device id structures to search in
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* @dev: the PCI device structure to match against.
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*
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* Used by a driver to check whether a PCI device present in the
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* system is in its list of supported devices. Returns the matching
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* pci_device_id structure or %NULL if there is no match.
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*
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* Deprecated, don't use this as it will not catch any dynamic ids
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* that a driver might want to check for.
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*/
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const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
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struct pci_dev *dev)
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{
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if (ids) {
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while (ids->vendor || ids->subvendor || ids->class_mask) {
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if (pci_match_one_device(ids, dev))
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return ids;
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ids++;
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL(pci_match_id);
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static const struct pci_device_id pci_device_id_any = {
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.vendor = PCI_ANY_ID,
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.device = PCI_ANY_ID,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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};
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/**
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* pci_match_device - Tell if a PCI device structure has a matching PCI device id structure
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* @drv: the PCI driver to match against
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* @dev: the PCI device structure to match against
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*
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* Used by a driver to check whether a PCI device present in the
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* system is in its list of supported devices. Returns the matching
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* pci_device_id structure or %NULL if there is no match.
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*/
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static const struct pci_device_id *pci_match_device(struct pci_driver *drv,
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struct pci_dev *dev)
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{
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struct pci_dynid *dynid;
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const struct pci_device_id *found_id = NULL;
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/* When driver_override is set, only bind to the matching driver */
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if (dev->driver_override && strcmp(dev->driver_override, drv->name))
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return NULL;
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/* Look at the dynamic ids first, before the static ones */
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spin_lock(&drv->dynids.lock);
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list_for_each_entry(dynid, &drv->dynids.list, node) {
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if (pci_match_one_device(&dynid->id, dev)) {
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found_id = &dynid->id;
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break;
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}
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}
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spin_unlock(&drv->dynids.lock);
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if (!found_id)
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found_id = pci_match_id(drv->id_table, dev);
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/* driver_override will always match, send a dummy id */
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if (!found_id && dev->driver_override)
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found_id = &pci_device_id_any;
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return found_id;
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}
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struct drv_dev_and_id {
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struct pci_driver *drv;
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struct pci_dev *dev;
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@ -399,8 +399,8 @@ found:
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return 1;
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}
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static int __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn,
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u8 pos, int cap, int *ttl)
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static u8 __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn,
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u8 pos, int cap, int *ttl)
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{
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u8 id;
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u16 ent;
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@ -423,22 +423,22 @@ static int __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn,
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return 0;
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}
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static int __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn,
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u8 pos, int cap)
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static u8 __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn,
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u8 pos, int cap)
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{
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int ttl = PCI_FIND_CAP_TTL;
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return __pci_find_next_cap_ttl(bus, devfn, pos, cap, &ttl);
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}
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int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap)
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u8 pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap)
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{
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return __pci_find_next_cap(dev->bus, dev->devfn,
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pos + PCI_CAP_LIST_NEXT, cap);
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}
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EXPORT_SYMBOL_GPL(pci_find_next_capability);
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static int __pci_bus_find_cap_start(struct pci_bus *bus,
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static u8 __pci_bus_find_cap_start(struct pci_bus *bus,
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unsigned int devfn, u8 hdr_type)
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{
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u16 status;
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@ -477,9 +477,9 @@ static int __pci_bus_find_cap_start(struct pci_bus *bus,
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* %PCI_CAP_ID_PCIX PCI-X
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* %PCI_CAP_ID_EXP PCI Express
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*/
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int pci_find_capability(struct pci_dev *dev, int cap)
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u8 pci_find_capability(struct pci_dev *dev, int cap)
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{
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int pos;
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u8 pos;
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pos = __pci_bus_find_cap_start(dev->bus, dev->devfn, dev->hdr_type);
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if (pos)
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@ -502,10 +502,9 @@ EXPORT_SYMBOL(pci_find_capability);
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* device's PCI configuration space or 0 in case the device does not
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* support it.
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*/
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int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
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u8 pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
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{
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int pos;
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u8 hdr_type;
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u8 hdr_type, pos;
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pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type);
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@ -528,11 +527,11 @@ EXPORT_SYMBOL(pci_bus_find_capability);
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* not support it. Some capabilities can occur several times, e.g., the
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* vendor-specific capability, and this provides a way to find them all.
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*/
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int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap)
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u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 start, int cap)
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{
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u32 header;
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int ttl;
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int pos = PCI_CFG_SPACE_SIZE;
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u16 pos = PCI_CFG_SPACE_SIZE;
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/* minimum 8 bytes per capability */
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ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
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@ -583,7 +582,7 @@ EXPORT_SYMBOL_GPL(pci_find_next_ext_capability);
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* %PCI_EXT_CAP_ID_DSN Device Serial Number
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* %PCI_EXT_CAP_ID_PWR Power Budgeting
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*/
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int pci_find_ext_capability(struct pci_dev *dev, int cap)
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u16 pci_find_ext_capability(struct pci_dev *dev, int cap)
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{
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return pci_find_next_ext_capability(dev, 0, cap);
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}
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@ -623,7 +622,7 @@ u64 pci_get_dsn(struct pci_dev *dev)
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}
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EXPORT_SYMBOL_GPL(pci_get_dsn);
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static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
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static u8 __pci_find_next_ht_cap(struct pci_dev *dev, u8 pos, int ht_cap)
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{
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int rc, ttl = PCI_FIND_CAP_TTL;
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u8 cap, mask;
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@ -650,11 +649,12 @@ static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
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return 0;
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}
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/**
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* pci_find_next_ht_capability - query a device's Hypertransport capabilities
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* pci_find_next_ht_capability - query a device's HyperTransport capabilities
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* @dev: PCI device to query
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* @pos: Position from which to continue searching
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* @ht_cap: Hypertransport capability code
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* @ht_cap: HyperTransport capability code
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*
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* To be used in conjunction with pci_find_ht_capability() to search for
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* all capabilities matching @ht_cap. @pos should always be a value returned
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@ -663,26 +663,26 @@ static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
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* NB. To be 100% safe against broken PCI devices, the caller should take
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* steps to avoid an infinite loop.
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*/
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int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap)
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u8 pci_find_next_ht_capability(struct pci_dev *dev, u8 pos, int ht_cap)
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{
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return __pci_find_next_ht_cap(dev, pos + PCI_CAP_LIST_NEXT, ht_cap);
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}
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EXPORT_SYMBOL_GPL(pci_find_next_ht_capability);
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/**
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* pci_find_ht_capability - query a device's Hypertransport capabilities
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* pci_find_ht_capability - query a device's HyperTransport capabilities
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* @dev: PCI device to query
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* @ht_cap: Hypertransport capability code
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* @ht_cap: HyperTransport capability code
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*
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* Tell if a device supports a given Hypertransport capability.
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* Tell if a device supports a given HyperTransport capability.
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* Returns an address within the device's PCI configuration space
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* or 0 in case the device does not support the request capability.
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* The address points to the PCI capability, of type PCI_CAP_ID_HT,
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* which has a Hypertransport capability matching @ht_cap.
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* which has a HyperTransport capability matching @ht_cap.
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*/
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int pci_find_ht_capability(struct pci_dev *dev, int ht_cap)
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u8 pci_find_ht_capability(struct pci_dev *dev, int ht_cap)
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{
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int pos;
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u8 pos;
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pos = __pci_bus_find_cap_start(dev->bus, dev->devfn, dev->hdr_type);
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if (pos)
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@ -4195,7 +4195,14 @@ void __iomem *devm_pci_remap_cfg_resource(struct device *dev,
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}
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size = resource_size(res);
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name = res->name ?: dev_name(dev);
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if (res->name)
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name = devm_kasprintf(dev, GFP_KERNEL, "%s %s", dev_name(dev),
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res->name);
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else
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name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
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if (!name)
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return IOMEM_ERR_PTR(-ENOMEM);
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if (!devm_request_mem_region(dev, res->start, size, name)) {
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dev_err(dev, "can't request region for resource %pR\n", res);
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@ -294,7 +294,8 @@ void pci_bus_put(struct pci_bus *bus);
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/* PCIe link information from Link Capabilities 2 */
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#define PCIE_LNKCAP2_SLS2SPEED(lnkcap2) \
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((lnkcap2) & PCI_EXP_LNKCAP2_SLS_32_0GB ? PCIE_SPEED_32_0GT : \
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((lnkcap2) & PCI_EXP_LNKCAP2_SLS_64_0GB ? PCIE_SPEED_64_0GT : \
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(lnkcap2) & PCI_EXP_LNKCAP2_SLS_32_0GB ? PCIE_SPEED_32_0GT : \
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(lnkcap2) & PCI_EXP_LNKCAP2_SLS_16_0GB ? PCIE_SPEED_16_0GT : \
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(lnkcap2) & PCI_EXP_LNKCAP2_SLS_8_0GB ? PCIE_SPEED_8_0GT : \
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(lnkcap2) & PCI_EXP_LNKCAP2_SLS_5_0GB ? PCIE_SPEED_5_0GT : \
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@ -303,7 +304,8 @@ void pci_bus_put(struct pci_bus *bus);
|
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|
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/* PCIe speed to Mb/s reduced by encoding overhead */
|
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#define PCIE_SPEED2MBS_ENC(speed) \
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((speed) == PCIE_SPEED_32_0GT ? 32000*128/130 : \
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((speed) == PCIE_SPEED_64_0GT ? 64000*128/130 : \
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(speed) == PCIE_SPEED_32_0GT ? 32000*128/130 : \
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(speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \
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(speed) == PCIE_SPEED_8_0GT ? 8000*128/130 : \
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(speed) == PCIE_SPEED_5_0GT ? 5000*8/10 : \
|
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|
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@ -677,7 +677,7 @@ const unsigned char pcie_link_speed[] = {
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PCIE_SPEED_8_0GT, /* 3 */
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PCIE_SPEED_16_0GT, /* 4 */
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PCIE_SPEED_32_0GT, /* 5 */
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PCI_SPEED_UNKNOWN, /* 6 */
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PCIE_SPEED_64_0GT, /* 6 */
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PCI_SPEED_UNKNOWN, /* 7 */
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PCI_SPEED_UNKNOWN, /* 8 */
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PCI_SPEED_UNKNOWN, /* 9 */
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@ -719,6 +719,7 @@ const char *pci_speed_string(enum pci_bus_speed speed)
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"8.0 GT/s PCIe", /* 0x16 */
|
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"16.0 GT/s PCIe", /* 0x17 */
|
||||
"32.0 GT/s PCIe", /* 0x18 */
|
||||
"64.0 GT/s PCIe", /* 0x19 */
|
||||
};
|
||||
|
||||
if (speed < ARRAY_SIZE(speed_strings))
|
||||
|
||||
@ -281,6 +281,7 @@ enum pci_bus_speed {
|
||||
PCIE_SPEED_8_0GT = 0x16,
|
||||
PCIE_SPEED_16_0GT = 0x17,
|
||||
PCIE_SPEED_32_0GT = 0x18,
|
||||
PCIE_SPEED_64_0GT = 0x19,
|
||||
PCI_SPEED_UNKNOWN = 0xff,
|
||||
};
|
||||
|
||||
@ -380,7 +381,7 @@ struct pci_dev {
|
||||
struct pcie_link_state *link_state; /* ASPM link state */
|
||||
unsigned int ltr_path:1; /* Latency Tolerance Reporting
|
||||
supported from root to here */
|
||||
int l1ss; /* L1SS Capability pointer */
|
||||
u16 l1ss; /* L1SS Capability pointer */
|
||||
#endif
|
||||
unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */
|
||||
|
||||
@ -1063,12 +1064,13 @@ void pci_sort_breadthfirst(void);
|
||||
|
||||
/* Generic PCI functions exported to card drivers */
|
||||
|
||||
int pci_find_capability(struct pci_dev *dev, int cap);
|
||||
int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
|
||||
int pci_find_ext_capability(struct pci_dev *dev, int cap);
|
||||
int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap);
|
||||
int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
|
||||
int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
|
||||
u8 pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
|
||||
u8 pci_find_capability(struct pci_dev *dev, int cap);
|
||||
u8 pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
|
||||
u8 pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
|
||||
u8 pci_find_next_ht_capability(struct pci_dev *dev, u8 pos, int ht_cap);
|
||||
u16 pci_find_ext_capability(struct pci_dev *dev, int cap);
|
||||
u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 pos, int cap);
|
||||
struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
|
||||
|
||||
u64 pci_get_dsn(struct pci_dev *dev);
|
||||
@ -1279,7 +1281,6 @@ void set_pcie_port_type(struct pci_dev *pdev);
|
||||
void set_pcie_hotplug_bridge(struct pci_dev *pdev);
|
||||
|
||||
/* Functions for PCI Hotplug drivers to use */
|
||||
int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
|
||||
unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge);
|
||||
unsigned int pci_rescan_bus(struct pci_bus *bus);
|
||||
void pci_lock_rescan_remove(void);
|
||||
@ -1719,7 +1720,7 @@ static inline int __pci_register_driver(struct pci_driver *drv,
|
||||
static inline int pci_register_driver(struct pci_driver *drv)
|
||||
{ return 0; }
|
||||
static inline void pci_unregister_driver(struct pci_driver *drv) { }
|
||||
static inline int pci_find_capability(struct pci_dev *dev, int cap)
|
||||
static inline u8 pci_find_capability(struct pci_dev *dev, int cap)
|
||||
{ return 0; }
|
||||
static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
|
||||
int cap)
|
||||
|
||||
@ -531,6 +531,7 @@
|
||||
#define PCI_EXP_LNKCAP_SLS_8_0GB 0x00000003 /* LNKCAP2 SLS Vector bit 2 */
|
||||
#define PCI_EXP_LNKCAP_SLS_16_0GB 0x00000004 /* LNKCAP2 SLS Vector bit 3 */
|
||||
#define PCI_EXP_LNKCAP_SLS_32_0GB 0x00000005 /* LNKCAP2 SLS Vector bit 4 */
|
||||
#define PCI_EXP_LNKCAP_SLS_64_0GB 0x00000006 /* LNKCAP2 SLS Vector bit 5 */
|
||||
#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
|
||||
#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */
|
||||
#define PCI_EXP_LNKCAP_ASPM_L0S 0x00000400 /* ASPM L0s Support */
|
||||
@ -562,6 +563,7 @@
|
||||
#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */
|
||||
#define PCI_EXP_LNKSTA_CLS_16_0GB 0x0004 /* Current Link Speed 16.0GT/s */
|
||||
#define PCI_EXP_LNKSTA_CLS_32_0GB 0x0005 /* Current Link Speed 32.0GT/s */
|
||||
#define PCI_EXP_LNKSTA_CLS_64_0GB 0x0006 /* Current Link Speed 64.0GT/s */
|
||||
#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */
|
||||
#define PCI_EXP_LNKSTA_NLW_X1 0x0010 /* Current Link Width x1 */
|
||||
#define PCI_EXP_LNKSTA_NLW_X2 0x0020 /* Current Link Width x2 */
|
||||
@ -670,6 +672,7 @@
|
||||
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */
|
||||
#define PCI_EXP_LNKCAP2_SLS_16_0GB 0x00000010 /* Supported Speed 16GT/s */
|
||||
#define PCI_EXP_LNKCAP2_SLS_32_0GB 0x00000020 /* Supported Speed 32GT/s */
|
||||
#define PCI_EXP_LNKCAP2_SLS_64_0GB 0x00000040 /* Supported Speed 64GT/s */
|
||||
#define PCI_EXP_LNKCAP2_CROSSLINK 0x00000100 /* Crosslink supported */
|
||||
#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
|
||||
#define PCI_EXP_LNKCTL2_TLS 0x000f
|
||||
@ -678,6 +681,7 @@
|
||||
#define PCI_EXP_LNKCTL2_TLS_8_0GT 0x0003 /* Supported Speed 8GT/s */
|
||||
#define PCI_EXP_LNKCTL2_TLS_16_0GT 0x0004 /* Supported Speed 16GT/s */
|
||||
#define PCI_EXP_LNKCTL2_TLS_32_0GT 0x0005 /* Supported Speed 32GT/s */
|
||||
#define PCI_EXP_LNKCTL2_TLS_64_0GT 0x0006 /* Supported Speed 64GT/s */
|
||||
#define PCI_EXP_LNKCTL2_ENTER_COMP 0x0010 /* Enter Compliance */
|
||||
#define PCI_EXP_LNKCTL2_TX_MARGIN 0x0380 /* Transmit Margin */
|
||||
#define PCI_EXP_LNKCTL2_HASD 0x0020 /* HW Autonomous Speed Disable */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user