Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue
Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2024-02-20 (ice) This series contains updates to ice driver only. Yochai sets parent device to properly reflect connection state between source DPLL and output pin. Arkadiusz fixes additional issues related to DPLL; proper reporting of phase_adjust value and preventing use/access of data while resetting. Amritha resolves ASSERT_RTNL() being triggered on certain reset/rebuild flows. * '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue: ice: Fix ASSERT_RTNL() warning during certain scenarios ice: fix pin phase adjust updates on PF reset ice: fix dpll periodic work data updates on PF reset ice: fix dpll and dpll_pin data access on PF reset ice: fix dpll input pin phase_adjust value updates ice: fix connection state of DPLL and out pin ==================== Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Link: https://lore.kernel.org/r/20240220214444.1039759-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
e872469c38
@ -190,15 +190,13 @@ static void ice_free_q_vector(struct ice_vsi *vsi, int v_idx)
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q_vector = vsi->q_vectors[v_idx];
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ice_for_each_tx_ring(tx_ring, q_vector->tx) {
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if (vsi->netdev)
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netif_queue_set_napi(vsi->netdev, tx_ring->q_index,
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NETDEV_QUEUE_TYPE_TX, NULL);
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ice_queue_set_napi(vsi, tx_ring->q_index, NETDEV_QUEUE_TYPE_TX,
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NULL);
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tx_ring->q_vector = NULL;
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}
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ice_for_each_rx_ring(rx_ring, q_vector->rx) {
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if (vsi->netdev)
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netif_queue_set_napi(vsi->netdev, rx_ring->q_index,
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NETDEV_QUEUE_TYPE_RX, NULL);
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ice_queue_set_napi(vsi, rx_ring->q_index, NETDEV_QUEUE_TYPE_RX,
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NULL);
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rx_ring->q_vector = NULL;
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}
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@ -30,6 +30,26 @@ static const char * const pin_type_name[] = {
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[ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input",
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};
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/**
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* ice_dpll_is_reset - check if reset is in progress
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* @pf: private board structure
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* @extack: error reporting
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*
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* If reset is in progress, fill extack with error.
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*
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* Return:
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* * false - no reset in progress
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* * true - reset in progress
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*/
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static bool ice_dpll_is_reset(struct ice_pf *pf, struct netlink_ext_ack *extack)
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{
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if (ice_is_reset_in_progress(pf->state)) {
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NL_SET_ERR_MSG(extack, "PF reset in progress");
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return true;
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}
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return false;
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}
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/**
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* ice_dpll_pin_freq_set - set pin's frequency
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* @pf: private board structure
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@ -109,6 +129,9 @@ ice_dpll_frequency_set(const struct dpll_pin *pin, void *pin_priv,
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struct ice_pf *pf = d->pf;
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int ret;
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if (ice_dpll_is_reset(pf, extack))
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return -EBUSY;
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mutex_lock(&pf->dplls.lock);
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ret = ice_dpll_pin_freq_set(pf, p, pin_type, frequency, extack);
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mutex_unlock(&pf->dplls.lock);
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@ -254,6 +277,7 @@ ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv,
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* ice_dpll_pin_enable - enable a pin on dplls
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* @hw: board private hw structure
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* @pin: pointer to a pin
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* @dpll_idx: dpll index to connect to output pin
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* @pin_type: type of pin being enabled
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* @extack: error reporting
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*
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@ -266,7 +290,7 @@ ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv,
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*/
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static int
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ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin,
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enum ice_dpll_pin_type pin_type,
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u8 dpll_idx, enum ice_dpll_pin_type pin_type,
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struct netlink_ext_ack *extack)
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{
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u8 flags = 0;
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@ -280,10 +304,12 @@ ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin,
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ret = ice_aq_set_input_pin_cfg(hw, pin->idx, 0, flags, 0, 0);
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break;
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case ICE_DPLL_PIN_TYPE_OUTPUT:
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flags = ICE_AQC_SET_CGU_OUT_CFG_UPDATE_SRC_SEL;
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if (pin->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN)
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flags |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN;
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flags |= ICE_AQC_SET_CGU_OUT_CFG_OUT_EN;
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ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, 0, 0, 0);
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ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, dpll_idx,
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0, 0);
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break;
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default:
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return -EINVAL;
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@ -370,7 +396,7 @@ ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin,
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case ICE_DPLL_PIN_TYPE_INPUT:
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ret = ice_aq_get_input_pin_cfg(&pf->hw, pin->idx, NULL, NULL,
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NULL, &pin->flags[0],
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&pin->freq, NULL);
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&pin->freq, &pin->phase_adjust);
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if (ret)
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goto err;
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if (ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN & pin->flags[0]) {
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@ -398,14 +424,27 @@ ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin,
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break;
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case ICE_DPLL_PIN_TYPE_OUTPUT:
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ret = ice_aq_get_output_pin_cfg(&pf->hw, pin->idx,
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&pin->flags[0], NULL,
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&pin->flags[0], &parent,
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&pin->freq, NULL);
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if (ret)
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goto err;
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if (ICE_AQC_SET_CGU_OUT_CFG_OUT_EN & pin->flags[0])
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pin->state[0] = DPLL_PIN_STATE_CONNECTED;
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else
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pin->state[0] = DPLL_PIN_STATE_DISCONNECTED;
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parent &= ICE_AQC_GET_CGU_OUT_CFG_DPLL_SRC_SEL;
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if (ICE_AQC_SET_CGU_OUT_CFG_OUT_EN & pin->flags[0]) {
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pin->state[pf->dplls.eec.dpll_idx] =
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parent == pf->dplls.eec.dpll_idx ?
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DPLL_PIN_STATE_CONNECTED :
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DPLL_PIN_STATE_DISCONNECTED;
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pin->state[pf->dplls.pps.dpll_idx] =
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parent == pf->dplls.pps.dpll_idx ?
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DPLL_PIN_STATE_CONNECTED :
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DPLL_PIN_STATE_DISCONNECTED;
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} else {
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pin->state[pf->dplls.eec.dpll_idx] =
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DPLL_PIN_STATE_DISCONNECTED;
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pin->state[pf->dplls.pps.dpll_idx] =
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DPLL_PIN_STATE_DISCONNECTED;
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}
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break;
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case ICE_DPLL_PIN_TYPE_RCLK_INPUT:
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for (parent = 0; parent < pf->dplls.rclk.num_parents;
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@ -568,9 +607,13 @@ ice_dpll_pin_state_set(const struct dpll_pin *pin, void *pin_priv,
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struct ice_pf *pf = d->pf;
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int ret;
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if (ice_dpll_is_reset(pf, extack))
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return -EBUSY;
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mutex_lock(&pf->dplls.lock);
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if (enable)
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ret = ice_dpll_pin_enable(&pf->hw, p, pin_type, extack);
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ret = ice_dpll_pin_enable(&pf->hw, p, d->dpll_idx, pin_type,
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extack);
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else
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ret = ice_dpll_pin_disable(&pf->hw, p, pin_type, extack);
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if (!ret)
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@ -603,6 +646,11 @@ ice_dpll_output_state_set(const struct dpll_pin *pin, void *pin_priv,
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struct netlink_ext_ack *extack)
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{
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bool enable = state == DPLL_PIN_STATE_CONNECTED;
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struct ice_dpll_pin *p = pin_priv;
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struct ice_dpll *d = dpll_priv;
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if (!enable && p->state[d->dpll_idx] == DPLL_PIN_STATE_DISCONNECTED)
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return 0;
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return ice_dpll_pin_state_set(pin, pin_priv, dpll, dpll_priv, enable,
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extack, ICE_DPLL_PIN_TYPE_OUTPUT);
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@ -665,14 +713,16 @@ ice_dpll_pin_state_get(const struct dpll_pin *pin, void *pin_priv,
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struct ice_pf *pf = d->pf;
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int ret;
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if (ice_dpll_is_reset(pf, extack))
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return -EBUSY;
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mutex_lock(&pf->dplls.lock);
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ret = ice_dpll_pin_state_update(pf, p, pin_type, extack);
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if (ret)
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goto unlock;
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if (pin_type == ICE_DPLL_PIN_TYPE_INPUT)
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if (pin_type == ICE_DPLL_PIN_TYPE_INPUT ||
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pin_type == ICE_DPLL_PIN_TYPE_OUTPUT)
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*state = p->state[d->dpll_idx];
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else if (pin_type == ICE_DPLL_PIN_TYPE_OUTPUT)
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*state = p->state[0];
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ret = 0;
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unlock:
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mutex_unlock(&pf->dplls.lock);
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@ -790,6 +840,9 @@ ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv,
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struct ice_pf *pf = d->pf;
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int ret;
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if (ice_dpll_is_reset(pf, extack))
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return -EBUSY;
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mutex_lock(&pf->dplls.lock);
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ret = ice_dpll_hw_input_prio_set(pf, d, p, prio, extack);
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mutex_unlock(&pf->dplls.lock);
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@ -910,6 +963,9 @@ ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv,
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u8 flag, flags_en = 0;
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int ret;
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if (ice_dpll_is_reset(pf, extack))
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return -EBUSY;
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mutex_lock(&pf->dplls.lock);
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switch (type) {
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case ICE_DPLL_PIN_TYPE_INPUT:
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@ -1069,6 +1125,9 @@ ice_dpll_rclk_state_on_pin_set(const struct dpll_pin *pin, void *pin_priv,
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int ret = -EINVAL;
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u32 hw_idx;
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if (ice_dpll_is_reset(pf, extack))
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return -EBUSY;
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mutex_lock(&pf->dplls.lock);
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hw_idx = parent->idx - pf->dplls.base_rclk_idx;
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if (hw_idx >= pf->dplls.num_inputs)
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@ -1123,6 +1182,9 @@ ice_dpll_rclk_state_on_pin_get(const struct dpll_pin *pin, void *pin_priv,
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int ret = -EINVAL;
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u32 hw_idx;
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if (ice_dpll_is_reset(pf, extack))
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return -EBUSY;
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mutex_lock(&pf->dplls.lock);
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hw_idx = parent->idx - pf->dplls.base_rclk_idx;
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if (hw_idx >= pf->dplls.num_inputs)
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@ -1305,8 +1367,10 @@ static void ice_dpll_periodic_work(struct kthread_work *work)
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struct ice_pf *pf = container_of(d, struct ice_pf, dplls);
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struct ice_dpll *de = &pf->dplls.eec;
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struct ice_dpll *dp = &pf->dplls.pps;
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int ret;
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int ret = 0;
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if (ice_is_reset_in_progress(pf->state))
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goto resched;
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mutex_lock(&pf->dplls.lock);
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ret = ice_dpll_update_state(pf, de, false);
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if (!ret)
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@ -1326,6 +1390,7 @@ static void ice_dpll_periodic_work(struct kthread_work *work)
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ice_dpll_notify_changes(de);
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ice_dpll_notify_changes(dp);
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resched:
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/* Run twice a second or reschedule if update failed */
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kthread_queue_delayed_work(d->kworker, &d->work,
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ret ? msecs_to_jiffies(10) :
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|
@ -2426,7 +2426,7 @@ ice_vsi_cfg_def(struct ice_vsi *vsi, struct ice_vsi_cfg_params *params)
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ice_vsi_map_rings_to_vectors(vsi);
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/* Associate q_vector rings to napi */
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ice_vsi_set_napi_queues(vsi, true);
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ice_vsi_set_napi_queues(vsi);
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vsi->stat_offsets_loaded = false;
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@ -2904,19 +2904,19 @@ void ice_vsi_dis_irq(struct ice_vsi *vsi)
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}
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/**
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* ice_queue_set_napi - Set the napi instance for the queue
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* __ice_queue_set_napi - Set the napi instance for the queue
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* @dev: device to which NAPI and queue belong
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* @queue_index: Index of queue
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* @type: queue type as RX or TX
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* @napi: NAPI context
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* @locked: is the rtnl_lock already held
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*
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* Set the napi instance for the queue
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* Set the napi instance for the queue. Caller indicates the lock status.
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*/
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static void
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ice_queue_set_napi(struct net_device *dev, unsigned int queue_index,
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enum netdev_queue_type type, struct napi_struct *napi,
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bool locked)
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__ice_queue_set_napi(struct net_device *dev, unsigned int queue_index,
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enum netdev_queue_type type, struct napi_struct *napi,
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bool locked)
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{
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if (!locked)
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rtnl_lock();
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@ -2926,26 +2926,79 @@ ice_queue_set_napi(struct net_device *dev, unsigned int queue_index,
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}
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/**
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* ice_q_vector_set_napi_queues - Map queue[s] associated with the napi
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* ice_queue_set_napi - Set the napi instance for the queue
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* @vsi: VSI being configured
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* @queue_index: Index of queue
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* @type: queue type as RX or TX
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* @napi: NAPI context
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*
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* Set the napi instance for the queue. The rtnl lock state is derived from the
|
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* execution path.
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*/
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void
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ice_queue_set_napi(struct ice_vsi *vsi, unsigned int queue_index,
|
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enum netdev_queue_type type, struct napi_struct *napi)
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{
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struct ice_pf *pf = vsi->back;
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|
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if (!vsi->netdev)
|
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return;
|
||||
|
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if (current_work() == &pf->serv_task ||
|
||||
test_bit(ICE_PREPARED_FOR_RESET, pf->state) ||
|
||||
test_bit(ICE_DOWN, pf->state) ||
|
||||
test_bit(ICE_SUSPENDED, pf->state))
|
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__ice_queue_set_napi(vsi->netdev, queue_index, type, napi,
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false);
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else
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__ice_queue_set_napi(vsi->netdev, queue_index, type, napi,
|
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true);
|
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}
|
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|
||||
/**
|
||||
* __ice_q_vector_set_napi_queues - Map queue[s] associated with the napi
|
||||
* @q_vector: q_vector pointer
|
||||
* @locked: is the rtnl_lock already held
|
||||
*
|
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* Associate the q_vector napi with all the queue[s] on the vector
|
||||
* Associate the q_vector napi with all the queue[s] on the vector.
|
||||
* Caller indicates the lock status.
|
||||
*/
|
||||
void ice_q_vector_set_napi_queues(struct ice_q_vector *q_vector, bool locked)
|
||||
void __ice_q_vector_set_napi_queues(struct ice_q_vector *q_vector, bool locked)
|
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{
|
||||
struct ice_rx_ring *rx_ring;
|
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struct ice_tx_ring *tx_ring;
|
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|
||||
ice_for_each_rx_ring(rx_ring, q_vector->rx)
|
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ice_queue_set_napi(q_vector->vsi->netdev, rx_ring->q_index,
|
||||
NETDEV_QUEUE_TYPE_RX, &q_vector->napi,
|
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locked);
|
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__ice_queue_set_napi(q_vector->vsi->netdev, rx_ring->q_index,
|
||||
NETDEV_QUEUE_TYPE_RX, &q_vector->napi,
|
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locked);
|
||||
|
||||
ice_for_each_tx_ring(tx_ring, q_vector->tx)
|
||||
ice_queue_set_napi(q_vector->vsi->netdev, tx_ring->q_index,
|
||||
NETDEV_QUEUE_TYPE_TX, &q_vector->napi,
|
||||
locked);
|
||||
__ice_queue_set_napi(q_vector->vsi->netdev, tx_ring->q_index,
|
||||
NETDEV_QUEUE_TYPE_TX, &q_vector->napi,
|
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locked);
|
||||
/* Also set the interrupt number for the NAPI */
|
||||
netif_napi_set_irq(&q_vector->napi, q_vector->irq.virq);
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_q_vector_set_napi_queues - Map queue[s] associated with the napi
|
||||
* @q_vector: q_vector pointer
|
||||
*
|
||||
* Associate the q_vector napi with all the queue[s] on the vector
|
||||
*/
|
||||
void ice_q_vector_set_napi_queues(struct ice_q_vector *q_vector)
|
||||
{
|
||||
struct ice_rx_ring *rx_ring;
|
||||
struct ice_tx_ring *tx_ring;
|
||||
|
||||
ice_for_each_rx_ring(rx_ring, q_vector->rx)
|
||||
ice_queue_set_napi(q_vector->vsi, rx_ring->q_index,
|
||||
NETDEV_QUEUE_TYPE_RX, &q_vector->napi);
|
||||
|
||||
ice_for_each_tx_ring(tx_ring, q_vector->tx)
|
||||
ice_queue_set_napi(q_vector->vsi, tx_ring->q_index,
|
||||
NETDEV_QUEUE_TYPE_TX, &q_vector->napi);
|
||||
/* Also set the interrupt number for the NAPI */
|
||||
netif_napi_set_irq(&q_vector->napi, q_vector->irq.virq);
|
||||
}
|
||||
@ -2953,11 +3006,10 @@ void ice_q_vector_set_napi_queues(struct ice_q_vector *q_vector, bool locked)
|
||||
/**
|
||||
* ice_vsi_set_napi_queues
|
||||
* @vsi: VSI pointer
|
||||
* @locked: is the rtnl_lock already held
|
||||
*
|
||||
* Associate queue[s] with napi for all vectors
|
||||
*/
|
||||
void ice_vsi_set_napi_queues(struct ice_vsi *vsi, bool locked)
|
||||
void ice_vsi_set_napi_queues(struct ice_vsi *vsi)
|
||||
{
|
||||
int i;
|
||||
|
||||
@ -2965,7 +3017,7 @@ void ice_vsi_set_napi_queues(struct ice_vsi *vsi, bool locked)
|
||||
return;
|
||||
|
||||
ice_for_each_q_vector(vsi, i)
|
||||
ice_q_vector_set_napi_queues(vsi->q_vectors[i], locked);
|
||||
ice_q_vector_set_napi_queues(vsi->q_vectors[i]);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -91,9 +91,15 @@ void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc);
|
||||
struct ice_vsi *
|
||||
ice_vsi_setup(struct ice_pf *pf, struct ice_vsi_cfg_params *params);
|
||||
|
||||
void ice_q_vector_set_napi_queues(struct ice_q_vector *q_vector, bool locked);
|
||||
void
|
||||
ice_queue_set_napi(struct ice_vsi *vsi, unsigned int queue_index,
|
||||
enum netdev_queue_type type, struct napi_struct *napi);
|
||||
|
||||
void ice_vsi_set_napi_queues(struct ice_vsi *vsi, bool locked);
|
||||
void __ice_q_vector_set_napi_queues(struct ice_q_vector *q_vector, bool locked);
|
||||
|
||||
void ice_q_vector_set_napi_queues(struct ice_q_vector *q_vector);
|
||||
|
||||
void ice_vsi_set_napi_queues(struct ice_vsi *vsi);
|
||||
|
||||
int ice_vsi_release(struct ice_vsi *vsi);
|
||||
|
||||
|
@ -3495,7 +3495,7 @@ static void ice_napi_add(struct ice_vsi *vsi)
|
||||
ice_for_each_q_vector(vsi, v_idx) {
|
||||
netif_napi_add(vsi->netdev, &vsi->q_vectors[v_idx]->napi,
|
||||
ice_napi_poll);
|
||||
ice_q_vector_set_napi_queues(vsi->q_vectors[v_idx], false);
|
||||
__ice_q_vector_set_napi_queues(vsi->q_vectors[v_idx], false);
|
||||
}
|
||||
}
|
||||
|
||||
@ -5447,6 +5447,7 @@ static int ice_reinit_interrupt_scheme(struct ice_pf *pf)
|
||||
if (ret)
|
||||
goto err_reinit;
|
||||
ice_vsi_map_rings_to_vectors(pf->vsi[v]);
|
||||
ice_vsi_set_napi_queues(pf->vsi[v]);
|
||||
}
|
||||
|
||||
ret = ice_req_irq_msix_misc(pf);
|
||||
|
Loading…
x
Reference in New Issue
Block a user