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ARM: restart: only perform setup for restart when soft-restarting

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We only need to set the system up for a soft-restart if we're going to
be doing a soft-restart.  Provide a new function (soft_restart()) which
does the setup and final call for this, and make platforms use it.
Eliminate the call to setup_restart() from the default handler.

This means that platforms arch_reset() function is no longer called with
the page tables prepared for a soft-restart, and caches will still be
enabled.

Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Krzysztof Ha■asa <khc@pm.waw.pl>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Acked-by: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2011-11-01 13:16:26 +00:00
parent 5aafec15bd
commit e879c862fb
21 changed files with 33 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/include/asm/system.h
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@ -101,6 +101,7 @@ extern int __pure cpu_architecture(void);
extern void cpu_init(void); extern void cpu_init(void);
void arm_machine_restart(char mode, const char *cmd); void arm_machine_restart(char mode, const char *cmd);
void soft_restart(unsigned long);
extern void (*arm_pm_restart)(char str, const char *cmd); extern void (*arm_pm_restart)(char str, const char *cmd);
#define UDBG_UNDEFINED (1 << 0) #define UDBG_UNDEFINED (1 << 0)

13
arch/arm/kernel/process.c
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@ -92,7 +92,7 @@ static int __init hlt_setup(char *__unused)
__setup("nohlt", nohlt_setup); __setup("nohlt", nohlt_setup);
__setup("hlt", hlt_setup); __setup("hlt", hlt_setup);
void arm_machine_restart(char mode, const char *cmd) void soft_restart(unsigned long addr)
{ {
/* Disable interrupts first */ /* Disable interrupts first */
local_irq_disable(); local_irq_disable();
@ -114,7 +114,16 @@ void arm_machine_restart(char mode, const char *cmd)
/* Push out any further dirty data, and ensure cache is empty */ /* Push out any further dirty data, and ensure cache is empty */
flush_cache_all(); flush_cache_all();
/* Now call the architecture specific reboot code. */ cpu_reset(addr);
}
void arm_machine_restart(char mode, const char *cmd)
{
/* Disable interrupts first */
local_irq_disable();
local_fiq_disable();
/* Call the architecture specific reboot code. */
arch_reset(mode, cmd); arch_reset(mode, cmd);
} }

2
arch/arm/mach-clps711x/include/mach/system.h
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@ -34,7 +34,7 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd) static inline void arch_reset(char mode, const char *cmd)
{ {
cpu_reset(0); soft_restart(0);
} }
#endif #endif

2
arch/arm/mach-ebsa110/include/mach/system.h
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@ -34,6 +34,6 @@ static inline void arch_idle(void)
asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
} }
#define arch_reset(mode, cmd) cpu_reset(0x80000000) #define arch_reset(mode, cmd) soft_restart(0x80000000)
#endif #endif

2
arch/arm/mach-footbridge/include/mach/system.h
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@ -24,7 +24,7 @@ static inline void arch_reset(char mode, const char *cmd)
/* /*
* Jump into the ROM * Jump into the ROM
*/ */
cpu_reset(0x41000000); soft_restart(0x41000000);
} else { } else {
if (machine_is_netwinder()) { if (machine_is_netwinder()) {
/* open up the SuperIO chip /* open up the SuperIO chip

2
arch/arm/mach-iop32x/include/mach/system.h
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@ -30,5 +30,5 @@ static inline void arch_reset(char mode, const char *cmd)
*IOP3XX_PCSR = 0x30; *IOP3XX_PCSR = 0x30;
/* Jump into ROM at address 0 */ /* Jump into ROM at address 0 */
cpu_reset(0); soft_restart(0);
} }

2
arch/arm/mach-iop33x/include/mach/system.h
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@ -19,5 +19,5 @@ static inline void arch_reset(char mode, const char *cmd)
*IOP3XX_PCSR = 0x30; *IOP3XX_PCSR = 0x30;
/* Jump into ROM at address 0 */ /* Jump into ROM at address 0 */
cpu_reset(0); soft_restart(0);
} }

2
arch/arm/mach-ixp4xx/include/mach/system.h
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@ -26,7 +26,7 @@ static inline void arch_reset(char mode, const char *cmd)
{ {
if ( 1 && mode == 's') { if ( 1 && mode == 's') {
/* Jump into ROM at address 0 */ /* Jump into ROM at address 0 */
cpu_reset(0); soft_restart(0);
} else { } else {
/* Use on-chip reset capability */ /* Use on-chip reset capability */

2
arch/arm/mach-ks8695/include/mach/system.h
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@ -32,7 +32,7 @@ static void arch_reset(char mode, const char *cmd)
unsigned int reg; unsigned int reg;
if (mode == 's') if (mode == 's')
cpu_reset(0); soft_restart(0);
/* disable timer0 */ /* disable timer0 */
reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);

4
arch/arm/mach-mmp/include/mach/system.h
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@ -19,8 +19,8 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd) static inline void arch_reset(char mode, const char *cmd)
{ {
if (cpu_is_pxa168()) if (cpu_is_pxa168())
cpu_reset(0xffff0000); soft_restart(0xffff0000);
else else
cpu_reset(0); soft_restart(0);
} }
#endif /* __ASM_MACH_SYSTEM_H */ #endif /* __ASM_MACH_SYSTEM_H */

2
arch/arm/mach-mxs/system.c
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@ -53,7 +53,7 @@ void arch_reset(char mode, const char *cmd)
mdelay(50); mdelay(50);
/* We'll take a jump through zero as a poor second */ /* We'll take a jump through zero as a poor second */
cpu_reset(0); soft_restart(0);
} }
static int __init mxs_arch_reset_init(void) static int __init mxs_arch_reset_init(void)

2
arch/arm/mach-pnx4008/include/mach/system.h
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@ -32,7 +32,7 @@ static void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd) static inline void arch_reset(char mode, const char *cmd)
{ {
cpu_reset(0); soft_restart(0);
} }
#endif #endif

2
arch/arm/mach-pxa/reset.c
View File

@ -88,7 +88,7 @@ void arch_reset(char mode, const char *cmd)
switch (mode) { switch (mode) {
case 's': case 's':
/* Jump into ROM at address 0 */ /* Jump into ROM at address 0 */
cpu_reset(0); soft_restart(0);
break; break;
case 'g': case 'g':
do_gpio_reset(); do_gpio_reset();

2
arch/arm/mach-rpc/include/mach/system.h
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@ -23,5 +23,5 @@ static inline void arch_reset(char mode, const char *cmd)
/* /*
* Jump into the ROM * Jump into the ROM
*/ */
cpu_reset(0); soft_restart(0);
} }

4
arch/arm/mach-s3c2410/include/mach/system-reset.h
View File

@ -19,7 +19,7 @@ static void
arch_reset(char mode, const char *cmd) arch_reset(char mode, const char *cmd)
{ {
if (mode == 's') { if (mode == 's') {
cpu_reset(0); soft_restart(0);
} }
if (s3c24xx_reset_hook) if (s3c24xx_reset_hook)
@ -28,5 +28,5 @@ arch_reset(char mode, const char *cmd)
arch_wdt_reset(); arch_wdt_reset();
/* we'll take a jump through zero as a poor second */ /* we'll take a jump through zero as a poor second */
cpu_reset(0); soft_restart(0);
} }

2
arch/arm/mach-s3c64xx/include/mach/system.h
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@ -24,7 +24,7 @@ static void arch_reset(char mode, const char *cmd)
arch_wdt_reset(); arch_wdt_reset();
/* if all else fails, or mode was for soft, jump to 0 */ /* if all else fails, or mode was for soft, jump to 0 */
cpu_reset(0); soft_restart(0);
} }
#endif /* __ASM_ARCH_IRQ_H */ #endif /* __ASM_ARCH_IRQ_H */

2
arch/arm/mach-sa1100/include/mach/system.h
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@ -14,7 +14,7 @@ static inline void arch_reset(char mode, const char *cmd)
{ {
if (mode == 's') { if (mode == 's') {
/* Jump into ROM at address 0 */ /* Jump into ROM at address 0 */
cpu_reset(0); soft_restart(0);
} else { } else {
/* Use on-chip reset capability */ /* Use on-chip reset capability */
RSRR = RSRR_SWR; RSRR = RSRR_SWR;

2
arch/arm/mach-shmobile/include/mach/system.h
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@ -8,7 +8,7 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd) static inline void arch_reset(char mode, const char *cmd)
{ {
cpu_reset(0); soft_restart(0);
} }
#endif #endif

2
arch/arm/mach-w90x900/include/mach/system.h
View File

@ -33,7 +33,7 @@ static void arch_reset(char mode, const char *cmd)
{ {
if (mode == 's') { if (mode == 's') {
/* Jump into ROM at address 0 */ /* Jump into ROM at address 0 */
cpu_reset(0); soft_restart(0);
} else { } else {
__raw_writel(WTE | WTRE | WTCLK, WTCR); __raw_writel(WTE | WTRE | WTCLK, WTCR);
} }

2
arch/arm/plat-mxc/system.c
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@ -70,7 +70,7 @@ void arch_reset(char mode, const char *cmd)
mdelay(50); mdelay(50);
/* we'll take a jump through zero as a poor second */ /* we'll take a jump through zero as a poor second */
cpu_reset(0); soft_restart(0);
} }
void mxc_arch_reset_init(void __iomem *base) void mxc_arch_reset_init(void __iomem *base)

2
arch/arm/plat-spear/include/plat/system.h
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@ -31,7 +31,7 @@ static inline void arch_reset(char mode, const char *cmd)
{ {
if (mode == 's') { if (mode == 's') {
/* software reset, Jump into ROM at address 0 */ /* software reset, Jump into ROM at address 0 */
cpu_reset(0); soft_restart(0);
} else { } else {
/* hardware reset, Use on-chip reset capability */ /* hardware reset, Use on-chip reset capability */
sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);