Second Round of Renesas ARM Based SoC Updates for v3.17
* Suspend on non-SMP update for r8a7790 * Move r8a7791.h out of mach directory. This is part of a multi-stage effort to move headers out of that directory. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTsf7FAAoJENfPZGlqN0++d2IP/jzdPy6gazqzLaGDvdwxpF/i hnJrcrfez5grzzfuYn/2MY3W1eeMc3I9JTs9lUhQOZzdvRRvA4Ghn7yvfZNFaCsO zML5jTdo1X4+h+LiIhEyUt23AZuhG7rk6cQ2RCTvGllLvqaJwvV3aIHl6MmfUkUm KeS4PqLwq8bFcgP0pxI5BHDfTEZ9A2OQNnDjJ9JD6hHlqKGBDYkj1SVDcVXJOezA Mjv5nWpmoIbYs9wgswY+fIlYPUO/ZJ3X4aycydqQGX0Uj1L/9vBU1caDZ88/jIRE NyiRKK5AOvmnxSHE4puq5g7eSAyJRLZ9BW88h6aB7YXkoEljgkiQ2tInp5sWVwHg lw1PumVhvbMQjsWh09Wvt80Pdfkahh8oe8keaTNVvmq/7ikAovcGd5jyvLnqb54r l1U4YWk+ihBwLviuu1tdM43hiDd5DAnfmH0Qw7VQWvAIFie7ACsrN7EFXO4iLDUm 1EAkmJsLrG70YzCc6DspOOUbBIs/Y4Znl0kmurkwSdgEJlFs9w8XOGuayxCUg5Cq 7PbgZw7PZWwzJ4DQXz88+yK4QzqhhMlFZrmBZjiwWO6V5XAaY0vxmqAlpz52aaAi jZOfYr6Wb4KIfAgX10mMvFTsyaorjToQ3okn1Y2/ORTEvxG02lfU6fOpX+bWzFhj ppD6lPvbHL/+HND6KzQ4 =mQ5+ -----END PGP SIGNATURE----- Merge tag 'renesas-soc2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Second Round of Renesas ARM Based SoC Updates for v3.17" from Simon Horman: * Suspend on non-SMP update for r8a7790 * Move r8a7791.h out of mach directory. This is part of a multi-stage effort to move headers out of that directory. * tag 'renesas-soc2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Allow r8a7791 to build non-SMP APMU code ARM: shmobile: Move r8a7791 reset code to pm-r8a7791.c ARM: shmobile: Allow r8a7790 to build non-SMP APMU code ARM: shmobile: Move r8a7790 reset code to pm-r8a7790.c ARM: shmobile: Use __init for APMU suspend init function ARM: shmobile: Adjust APMU code to build for non-SMP ARM: shmobile: Allow use of boot code for non-SMP case ARM: shmobile: Move r8a7791.h Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
e87d10b29f
@ -34,17 +34,19 @@ obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o
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obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o
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endif
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# CPU reset vector handling objects
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cpu-y := platsmp.o headsmp.o
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cpu-$(CONFIG_ARCH_R8A7790) += platsmp-apmu.o
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cpu-$(CONFIG_ARCH_R8A7791) += platsmp-apmu.o
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# SMP objects
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smp-y := platsmp.o headsmp.o
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smp-y := $(cpu-y)
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smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
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smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o
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smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o platsmp-apmu.o
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smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o platsmp-apmu.o
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smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o
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smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o
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smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
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# IRQ objects
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obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
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# PM objects
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obj-$(CONFIG_SUSPEND) += suspend.o
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obj-$(CONFIG_CPU_IDLE) += cpuidle.o
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@ -53,8 +55,11 @@ obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o
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obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
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obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
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obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o
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obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o
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obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o
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obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o $(cpu-y)
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obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o $(cpu-y)
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# IRQ objects
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obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
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# Board objects
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ifdef CONFIG_ARCH_SHMOBILE_MULTI
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@ -23,11 +23,13 @@
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#include <linux/kernel.h>
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#include <linux/of_platform.h>
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#include <linux/platform_data/rcar-du.h>
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#include <mach/r8a7791.h>
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#include <asm/mach/arch.h>
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#include "clock.h"
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#include "common.h"
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#include "irqs.h"
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#include "r8a7791.h"
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#include "rcar-gen2.h"
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/* DU */
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@ -45,11 +45,13 @@
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#include <linux/spi/flash.h>
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#include <linux/spi/rspi.h>
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#include <linux/spi/spi.h>
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#include <mach/r8a7791.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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#include "irqs.h"
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#include "r8a7791.h"
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#include "rcar-gen2.h"
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/* DU */
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@ -10,14 +10,17 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <linux/threads.h>
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#include <asm/memory.h>
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#ifdef CONFIG_SMP
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ENTRY(shmobile_invalidate_start)
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bl v7_invalidate_l1
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b secondary_startup
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ENDPROC(shmobile_invalidate_start)
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#endif
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/*
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* Reset vector for secondary CPUs.
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@ -68,7 +71,7 @@ shmobile_smp_boot_find_mpidr:
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shmobile_smp_boot_next:
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add r1, r1, #1
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cmp r1, #CONFIG_NR_CPUS
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cmp r1, #NR_CPUS
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blo shmobile_smp_boot_find_mpidr
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b shmobile_smp_sleep
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@ -85,10 +88,10 @@ ENDPROC(shmobile_smp_sleep)
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.globl shmobile_smp_mpidr
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shmobile_smp_mpidr:
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1: .space CONFIG_NR_CPUS * 4
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1: .space NR_CPUS * 4
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.globl shmobile_smp_fn
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shmobile_smp_fn:
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2: .space CONFIG_NR_CPUS * 4
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2: .space NR_CPUS * 4
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.globl shmobile_smp_arg
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shmobile_smp_arg:
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3: .space CONFIG_NR_CPUS * 4
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3: .space NR_CPUS * 4
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@ -15,6 +15,7 @@
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#include <linux/of_address.h>
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#include <linux/smp.h>
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#include <linux/suspend.h>
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#include <linux/threads.h>
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#include <asm/cacheflush.h>
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#include <asm/cp15.h>
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#include <asm/proc-fns.h>
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@ -25,13 +26,13 @@
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static struct {
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void __iomem *iomem;
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int bit;
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} apmu_cpus[CONFIG_NR_CPUS];
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} apmu_cpus[NR_CPUS];
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#define WUPCR_OFFS 0x10
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#define PSTR_OFFS 0x40
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#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
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static int apmu_power_on(void __iomem *p, int bit)
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static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
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{
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/* request power on */
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writel_relaxed(BIT(bit), p + WUPCR_OFFS);
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@ -50,7 +51,7 @@ static int apmu_power_off(void __iomem *p, int bit)
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return 0;
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}
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static int apmu_power_off_poll(void __iomem *p, int bit)
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static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit)
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{
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int k;
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@ -73,7 +74,7 @@ static int apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu))
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static void apmu_init_cpu(struct resource *res, int cpu, int bit)
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{
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if (apmu_cpus[cpu].iomem)
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if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
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return;
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apmu_cpus[cpu].iomem = ioremap_nocache(res->start, resource_size(res));
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@ -137,6 +138,7 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus)
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apmu_parse_cfg(apmu_init_cpu);
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}
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#ifdef CONFIG_SMP
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int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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/* For this particular CPU register boot vector */
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@ -144,6 +146,7 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
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return apmu_wrap(cpu, apmu_power_on);
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}
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#endif
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#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND)
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/* nicked from arch/arm/mach-exynos/hotplug.c */
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@ -237,7 +240,7 @@ static int shmobile_smp_apmu_enter_suspend(suspend_state_t state)
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return 0;
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}
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void shmobile_smp_apmu_suspend_init(void)
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void __init shmobile_smp_apmu_suspend_init(void)
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{
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shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend;
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}
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@ -11,12 +11,22 @@
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*/
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <asm/io.h>
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#include "common.h"
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#include "pm-rcar.h"
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#include "r8a7790.h"
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/* RST */
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA7BAR 0x0030
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#define CA15RESCNT 0x0040
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#define CA7RESCNT 0x0044
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/* On-chip RAM */
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#define MERAM 0xe8080000
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/* SYSC */
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#define SYSCIER 0x0c
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#define SYSCIMR 0x10
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@ -40,8 +50,33 @@ static inline void r8a7790_sysc_init(void) {}
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void __init r8a7790_pm_init(void)
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{
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void __iomem *p;
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u32 bar;
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static int once;
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if (!once++)
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r8a7790_sysc_init();
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if (once++)
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return;
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/* MERAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(MERAM, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (MERAM >> 8) & 0xfffffc00;
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar, p + CA7BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA7BAR);
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/* de-assert reset for all CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
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p + CA15RESCNT);
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writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
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p + CA7RESCNT);
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iounmap(p);
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r8a7790_sysc_init();
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shmobile_smp_apmu_suspend_init();
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}
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@ -10,10 +10,17 @@
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* for more details.
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*/
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#include <asm/io.h>
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#include <linux/kernel.h>
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#include <mach/r8a7791.h>
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#include <linux/smp.h>
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#include <asm/io.h>
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#include "common.h"
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#include "pm-rcar.h"
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#include "r8a7791.h"
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA15RESCNT 0x0040
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#define RAM 0xe6300000
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/* SYSC */
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#define SYSCIER 0x0c
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@ -38,10 +45,29 @@ static inline void r8a7791_sysc_init(void) {}
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void __init r8a7791_pm_init(void)
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{
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void __iomem *p;
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u32 bar;
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static int once;
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if (once++)
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return;
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/* RAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(RAM, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (RAM >> 8) & 0xfffffc00;
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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/* enable clocks to all CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
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p + CA15RESCNT);
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iounmap(p);
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r8a7791_sysc_init();
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shmobile_smp_apmu_suspend_init();
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}
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@ -26,10 +26,12 @@
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#include <linux/platform_data/irq-renesas-irqc.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_timer.h>
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#include <mach/r8a7791.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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#include "irqs.h"
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#include "r8a7791.h"
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#include "rcar-gen2.h"
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static const struct resource pfc_resources[] __initconst = {
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@ -24,13 +24,6 @@
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#include "pm-rcar.h"
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#include "r8a7790.h"
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA7BAR 0x0030
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#define CA15RESCNT 0x0040
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#define CA7RESCNT 0x0044
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#define MERAM 0xe8080000
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static struct rcar_sysc_ch r8a7790_ca15_scu = {
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.chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
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.isr_bit = 12, /* CA15-SCU */
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@ -43,35 +36,11 @@ static struct rcar_sysc_ch r8a7790_ca7_scu = {
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static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *p;
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u32 bar;
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/* let APMU code install data related to shmobile_boot_vector */
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shmobile_smp_apmu_prepare_cpus(max_cpus);
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/* MERAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(MERAM, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (MERAM >> 8) & 0xfffffc00;
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar, p + CA7BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA7BAR);
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/* enable clocks to all CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
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p + CA15RESCNT);
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writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
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p + CA7RESCNT);
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iounmap(p);
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/* turn on power to SCU */
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r8a7790_pm_init();
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shmobile_smp_apmu_suspend_init();
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rcar_sysc_power_up(&r8a7790_ca15_scu);
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rcar_sysc_power_up(&r8a7790_ca7_scu);
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}
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|
@ -17,42 +17,19 @@
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
|
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#include <asm/smp_plat.h>
|
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#include <mach/r8a7791.h>
|
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#include "common.h"
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#include "rcar-gen2.h"
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA15RESCNT 0x0040
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#define RAM 0xe6300000
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#include <asm/smp_plat.h>
|
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|
||||
#include "common.h"
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||||
#include "r8a7791.h"
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#include "rcar-gen2.h"
|
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|
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static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
void __iomem *p;
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u32 bar;
|
||||
|
||||
/* let APMU code install data related to shmobile_boot_vector */
|
||||
shmobile_smp_apmu_prepare_cpus(max_cpus);
|
||||
|
||||
/* RAM for jump stub, because BAR requires 256KB aligned address */
|
||||
p = ioremap_nocache(RAM, shmobile_boot_size);
|
||||
memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
|
||||
iounmap(p);
|
||||
|
||||
/* setup reset vectors */
|
||||
p = ioremap_nocache(RST, 0x63);
|
||||
bar = (RAM >> 8) & 0xfffffc00;
|
||||
writel_relaxed(bar, p + CA15BAR);
|
||||
writel_relaxed(bar | 0x10, p + CA15BAR);
|
||||
|
||||
/* enable clocks to all CPUs */
|
||||
writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
|
||||
p + CA15RESCNT);
|
||||
iounmap(p);
|
||||
|
||||
r8a7791_pm_init();
|
||||
shmobile_smp_apmu_suspend_init();
|
||||
}
|
||||
|
||||
static int r8a7791_smp_boot_secondary(unsigned int cpu,
|
||||
|
Loading…
Reference in New Issue
Block a user