ARM: imx: enable anatop suspend/resume
Anatop module have sereval configurations for user to reduce the power consumption in suspend, provide suspend/resume interface for further use and enable fet_odrive to reduce CORE LDO leakage during suspend. As we have a common anatop file, remove all the operations of anatop module in other files, use anatop interfaces to do that. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Anson Huang
Shawn Guo
parent
cb872cacb2
commit
e95dddb34c
@ -65,6 +65,9 @@ config IRAM_ALLOC
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bool
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select GENERIC_ALLOCATOR
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config HAVE_IMX_ANATOP
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bool
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config HAVE_IMX_GPC
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bool
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@ -795,6 +798,7 @@ config SOC_IMX6Q
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select CPU_V7
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select HAVE_ARM_SCU
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select HAVE_CAN_FLEXCAN if CAN
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select HAVE_IMX_ANATOP
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select HAVE_IMX_GPC
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select HAVE_IMX_MMDC
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select HAVE_IMX_SRC
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@ -91,6 +91,7 @@ obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
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obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
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obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
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obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
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obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
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obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
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obj-$(CONFIG_HAVE_IMX_SRC) += src.o
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74
arch/arm/mach-imx/anatop.c
Normal file
74
arch/arm/mach-imx/anatop.c
Normal file
@ -0,0 +1,74 @@
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/*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#define REG_SET 0x4
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#define REG_CLR 0x8
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#define ANADIG_REG_CORE 0x140
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#define ANADIG_USB1_CHRG_DETECT 0x1b0
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#define ANADIG_USB2_CHRG_DETECT 0x210
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#define ANADIG_DIGPROG 0x260
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#define BM_ANADIG_REG_CORE_FET_ODRIVE 0x20000000
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#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x80000
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#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x100000
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static struct regmap *anatop;
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static void imx_anatop_enable_fet_odrive(bool enable)
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{
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regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR),
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BM_ANADIG_REG_CORE_FET_ODRIVE);
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}
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void imx_anatop_pre_suspend(void)
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{
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imx_anatop_enable_fet_odrive(true);
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}
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void imx_anatop_post_resume(void)
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{
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imx_anatop_enable_fet_odrive(false);
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}
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void imx_anatop_usb_chrg_detect_disable(void)
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{
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regmap_write(anatop, ANADIG_USB1_CHRG_DETECT,
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BM_ANADIG_USB_CHRG_DETECT_EN_B
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| BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
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regmap_write(anatop, ANADIG_USB2_CHRG_DETECT,
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BM_ANADIG_USB_CHRG_DETECT_EN_B |
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BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
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}
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u32 imx_anatop_get_digprog(void)
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{
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u32 val;
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regmap_read(anatop, ANADIG_DIGPROG, &val);
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return val;
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}
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void __init imx_anatop_init(void)
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{
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anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
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if (IS_ERR(anatop)) {
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pr_err("%s: failed to find imx6q-anatop regmap!\n", __func__);
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return;
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}
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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@ -128,6 +128,11 @@ extern void imx_src_prepare_restart(void);
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extern void imx_gpc_init(void);
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extern void imx_gpc_pre_suspend(void);
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extern void imx_gpc_post_resume(void);
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extern void imx_anatop_init(void);
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extern void imx_anatop_pre_suspend(void);
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extern void imx_anatop_post_resume(void);
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extern void imx_anatop_usb_chrg_detect_disable(void);
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extern u32 imx_anatop_get_digprog(void);
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extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
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extern void imx6q_set_chicken_bit(void);
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@ -1,5 +1,5 @@
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011-2013 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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@ -39,27 +39,12 @@
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#include "cpuidle.h"
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#include "hardware.h"
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#define IMX6Q_ANALOG_DIGPROG 0x260
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static int imx6q_revision(void)
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{
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struct device_node *np;
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void __iomem *base;
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static u32 rev;
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if (!rev) {
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np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
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if (!np)
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return IMX_CHIP_REVISION_UNKNOWN;
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base = of_iomap(np, 0);
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if (!base) {
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of_node_put(np);
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return IMX_CHIP_REVISION_UNKNOWN;
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}
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rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
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iounmap(base);
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of_node_put(np);
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}
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if (!rev)
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rev = imx_anatop_get_digprog();
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switch (rev & 0xff) {
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case 0:
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@ -165,29 +150,7 @@ static void __init imx6q_1588_init(void)
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}
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static void __init imx6q_usb_init(void)
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{
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struct regmap *anatop;
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#define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
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#define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
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#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
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#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
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anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
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if (!IS_ERR(anatop)) {
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/*
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* The external charger detector needs to be disabled,
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* or the signal at DP will be poor
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*/
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regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
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BM_ANADIG_USB_CHRG_DETECT_EN_B
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| BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
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regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
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BM_ANADIG_USB_CHRG_DETECT_EN_B |
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BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
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} else {
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pr_warn("failed to find fsl,imx6q-anatop regmap\n");
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}
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imx_anatop_usb_chrg_detect_disable();
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}
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static void __init imx6q_init_machine(void)
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@ -197,9 +160,11 @@ static void __init imx6q_init_machine(void)
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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imx_anatop_init();
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imx6q_pm_init();
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imx6q_usb_init();
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imx6q_1588_init();
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imx_print_silicon_rev("i.MX6Q", imx6q_revision());
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}
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#define OCOTP_CFG3 0x440
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@ -293,7 +258,6 @@ static void __init imx6q_timer_init(void)
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{
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mx6q_clocks_init();
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twd_local_timer_of_register();
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imx_print_silicon_rev("i.MX6Q", imx6q_revision());
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}
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static const char *imx6q_dt_compat[] __initdata = {
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@ -1,5 +1,5 @@
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011-2013 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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@ -34,10 +34,12 @@ static int imx6q_pm_enter(suspend_state_t state)
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case PM_SUSPEND_MEM:
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imx6q_set_lpm(STOP_POWER_OFF);
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imx_gpc_pre_suspend();
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imx_anatop_pre_suspend();
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imx_set_cpu_jump(0, v7_cpu_resume);
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/* Zzz ... */
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cpu_suspend(0, imx6q_suspend_finish);
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imx_smp_prepare();
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imx_anatop_post_resume();
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imx_gpc_post_resume();
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imx6q_set_lpm(WAIT_CLOCKED);
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break;
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