ARM: dts: renesas: rzg1: Add TMU nodes
Add device nodes for the Timer Units (TMU) on the RZ/G1H (R8A7742), RZ/G1M (R8A7743), RZ/G1N (R8A7744), RZ/G1E (R8A7745), and RZ/G1C (R8A77470) SoCs. Note that TMU channel 0 on RZ/G1C is not added, as its module clock is not documented. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/b09f55e0089a9824d43e89fd6bac3cbd48f40d8b.1710864964.git.geert+renesas@glider.be
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ecc79ab919
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@ -404,6 +404,64 @@
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resets = <&cpg 407>;
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};
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tmu0: timer@e61e0000 {
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compatible = "renesas,tmu-r8a7742", "renesas,tmu";
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reg = <0 0xe61e0000 0 0x30>;
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2";
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clocks = <&cpg CPG_MOD 125>;
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clock-names = "fck";
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power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
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resets = <&cpg 125>;
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status = "disabled";
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};
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tmu1: timer@fff60000 {
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compatible = "renesas,tmu-r8a7742", "renesas,tmu";
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reg = <0 0xfff60000 0 0x30>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 111>;
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clock-names = "fck";
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power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
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resets = <&cpg 111>;
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status = "disabled";
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};
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tmu2: timer@fff70000 {
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compatible = "renesas,tmu-r8a7742", "renesas,tmu";
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reg = <0 0xfff70000 0 0x30>;
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interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 122>;
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clock-names = "fck";
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power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
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resets = <&cpg 122>;
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status = "disabled";
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};
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tmu3: timer@fff80000 {
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compatible = "renesas,tmu-r8a7742", "renesas,tmu";
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reg = <0 0xfff80000 0 0x30>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2";
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clocks = <&cpg CPG_MOD 121>;
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clock-names = "fck";
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power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
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resets = <&cpg 121>;
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status = "disabled";
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};
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thermal: thermal@e61f0000 {
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compatible = "renesas,thermal-r8a7742",
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"renesas,rcar-gen2-thermal";
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@ -329,6 +329,64 @@
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resets = <&cpg 407>;
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};
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tmu0: timer@e61e0000 {
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compatible = "renesas,tmu-r8a7743", "renesas,tmu";
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reg = <0 0xe61e0000 0 0x30>;
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2";
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clocks = <&cpg CPG_MOD 125>;
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clock-names = "fck";
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power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
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resets = <&cpg 125>;
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status = "disabled";
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};
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tmu1: timer@fff60000 {
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compatible = "renesas,tmu-r8a7743", "renesas,tmu";
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reg = <0 0xfff60000 0 0x30>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 111>;
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clock-names = "fck";
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power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
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resets = <&cpg 111>;
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status = "disabled";
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};
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tmu2: timer@fff70000 {
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compatible = "renesas,tmu-r8a7743", "renesas,tmu";
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reg = <0 0xfff70000 0 0x30>;
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interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 122>;
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clock-names = "fck";
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power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
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resets = <&cpg 122>;
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status = "disabled";
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};
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tmu3: timer@fff80000 {
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compatible = "renesas,tmu-r8a7743", "renesas,tmu";
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reg = <0 0xfff80000 0 0x30>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2";
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clocks = <&cpg CPG_MOD 121>;
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clock-names = "fck";
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power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
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resets = <&cpg 121>;
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status = "disabled";
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};
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thermal: thermal@e61f0000 {
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compatible = "renesas,thermal-r8a7743",
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"renesas,rcar-gen2-thermal";
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@ -329,6 +329,64 @@
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resets = <&cpg 407>;
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};
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tmu0: timer@e61e0000 {
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compatible = "renesas,tmu-r8a7744", "renesas,tmu";
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reg = <0 0xe61e0000 0 0x30>;
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2";
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clocks = <&cpg CPG_MOD 125>;
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clock-names = "fck";
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power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
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resets = <&cpg 125>;
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status = "disabled";
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};
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tmu1: timer@fff60000 {
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compatible = "renesas,tmu-r8a7744", "renesas,tmu";
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reg = <0 0xfff60000 0 0x30>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 111>;
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clock-names = "fck";
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power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
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resets = <&cpg 111>;
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status = "disabled";
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};
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tmu2: timer@fff70000 {
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compatible = "renesas,tmu-r8a7744", "renesas,tmu";
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reg = <0 0xfff70000 0 0x30>;
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interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 122>;
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clock-names = "fck";
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power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
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resets = <&cpg 122>;
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status = "disabled";
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};
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tmu3: timer@fff80000 {
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compatible = "renesas,tmu-r8a7744", "renesas,tmu";
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reg = <0 0xfff80000 0 0x30>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2";
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clocks = <&cpg CPG_MOD 121>;
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clock-names = "fck";
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power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
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resets = <&cpg 121>;
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status = "disabled";
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};
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thermal: thermal@e61f0000 {
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compatible = "renesas,thermal-r8a7744",
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"renesas,rcar-gen2-thermal";
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@ -304,6 +304,64 @@
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resets = <&cpg 407>;
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};
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tmu0: timer@e61e0000 {
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compatible = "renesas,tmu-r8a7745", "renesas,tmu";
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reg = <0 0xe61e0000 0 0x30>;
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2";
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clocks = <&cpg CPG_MOD 125>;
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clock-names = "fck";
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power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
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resets = <&cpg 125>;
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status = "disabled";
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};
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tmu1: timer@fff60000 {
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compatible = "renesas,tmu-r8a7745", "renesas,tmu";
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reg = <0 0xfff60000 0 0x30>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 111>;
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clock-names = "fck";
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power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
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resets = <&cpg 111>;
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status = "disabled";
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};
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tmu2: timer@fff70000 {
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compatible = "renesas,tmu-r8a7745", "renesas,tmu";
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reg = <0 0xfff70000 0 0x30>;
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interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 122>;
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clock-names = "fck";
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power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
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resets = <&cpg 122>;
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status = "disabled";
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};
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tmu3: timer@fff80000 {
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compatible = "renesas,tmu-r8a7745", "renesas,tmu";
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reg = <0 0xfff80000 0 0x30>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2";
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clocks = <&cpg CPG_MOD 121>;
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clock-names = "fck";
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power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
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resets = <&cpg 121>;
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status = "disabled";
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};
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ipmmu_sy0: iommu@e6280000 {
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compatible = "renesas,ipmmu-r8a7745",
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"renesas,ipmmu-vmsa";
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@ -241,6 +241,50 @@
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resets = <&cpg 407>;
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};
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tmu1: timer@fff60000 {
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compatible = "renesas,tmu-r8a77470", "renesas,tmu";
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reg = <0 0xfff60000 0 0x30>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 111>;
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clock-names = "fck";
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power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
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resets = <&cpg 111>;
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status = "disabled";
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};
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tmu2: timer@fff70000 {
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compatible = "renesas,tmu-r8a77470", "renesas,tmu";
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reg = <0 0xfff70000 0 0x30>;
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interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&cpg CPG_MOD 122>;
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clock-names = "fck";
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power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
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resets = <&cpg 122>;
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status = "disabled";
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};
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tmu3: timer@fff80000 {
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compatible = "renesas,tmu-r8a77470", "renesas,tmu";
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reg = <0 0xfff80000 0 0x30>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2";
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clocks = <&cpg CPG_MOD 121>;
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clock-names = "fck";
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power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
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resets = <&cpg 121>;
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status = "disabled";
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};
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icram0: sram@e63a0000 {
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compatible = "mmio-sram";
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reg = <0 0xe63a0000 0 0x12000>;
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