powerpc/eeh: Initialization for PowerNV
The patch initializes EEH for PowerNV platform. Because the OPAL APIs requires HUB ID, we need trace that through struct pnv_phb. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -974,6 +974,11 @@ static void pnv_pci_ioda_fixup(void)
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pnv_pci_ioda_setup_PEs();
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pnv_pci_ioda_setup_seg();
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pnv_pci_ioda_setup_DMA();
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#ifdef CONFIG_EEH
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eeh_addr_cache_build();
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eeh_init();
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#endif
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}
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/*
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@ -1050,7 +1055,8 @@ static void pnv_pci_ioda_shutdown(struct pnv_phb *phb)
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OPAL_ASSERT_RESET);
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}
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void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
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void __init pnv_pci_init_ioda_phb(struct device_node *np,
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u64 hub_id, int ioda_type)
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{
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struct pci_controller *hose;
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static int primary = 1;
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@ -1088,6 +1094,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
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hose->first_busno = 0;
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hose->last_busno = 0xff;
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hose->private_data = phb;
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phb->hub_id = hub_id;
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phb->opal_id = phb_id;
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phb->type = ioda_type;
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@ -1173,6 +1180,9 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
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phb->ioda.io_size, phb->ioda.io_segsize);
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phb->hose->ops = &pnv_pci_ops;
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#ifdef CONFIG_EEH
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phb->eeh_ops = &ioda_eeh_ops;
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#endif
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/* Setup RID -> PE mapping function */
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phb->bdfn_to_pe = pnv_ioda_bdfn_to_pe;
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@ -1213,7 +1223,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
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void pnv_pci_init_ioda2_phb(struct device_node *np)
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{
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pnv_pci_init_ioda_phb(np, PNV_PHB_IODA2);
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pnv_pci_init_ioda_phb(np, 0, PNV_PHB_IODA2);
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}
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void __init pnv_pci_init_ioda_hub(struct device_node *np)
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@ -1236,6 +1246,6 @@ void __init pnv_pci_init_ioda_hub(struct device_node *np)
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for_each_child_of_node(np, phbn) {
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/* Look for IODA1 PHBs */
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if (of_device_is_compatible(phbn, "ibm,ioda-phb"))
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pnv_pci_init_ioda_phb(phbn, PNV_PHB_IODA1);
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pnv_pci_init_ioda_phb(phbn, hub_id, PNV_PHB_IODA1);
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}
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}
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@ -95,7 +95,7 @@ static void pnv_pci_p5ioc2_dma_dev_setup(struct pnv_phb *phb,
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set_iommu_table_base(&pdev->dev, &phb->p5ioc2.iommu_table);
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}
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static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np,
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static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,
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void *tce_mem, u64 tce_size)
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{
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struct pnv_phb *phb;
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@ -136,6 +136,7 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np,
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phb->hose->first_busno = 0;
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phb->hose->last_busno = 0xff;
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phb->hose->private_data = phb;
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phb->hub_id = hub_id;
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phb->opal_id = phb_id;
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phb->type = PNV_PHB_P5IOC2;
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phb->model = PNV_PHB_MODEL_P5IOC2;
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@ -229,7 +230,8 @@ void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)
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for_each_child_of_node(np, phbn) {
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if (of_device_is_compatible(phbn, "ibm,p5ioc2-pcix") ||
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of_device_is_compatible(phbn, "ibm,p5ioc2-pciex")) {
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pnv_pci_init_p5ioc2_phb(phbn, tce_mem, tce_per_phb);
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pnv_pci_init_p5ioc2_phb(phbn, hub_id,
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tce_mem, tce_per_phb);
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tce_mem += tce_per_phb;
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}
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}
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