ARM: imx: add ocram clock for imx53
Add missing ocram gate clock for imx53 and also represent it in device tree ocram node. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -197,6 +197,7 @@ clocks and IDs.
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spdif0_gate 183
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spdif1_gate 184
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spdif_ipg_gate 185
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ocram 186
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Examples (for mx53):
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@ -1121,6 +1121,7 @@
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ocram: sram@f8000000 {
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compatible = "mmio-sram";
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reg = <0xf8000000 0x20000>;
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clocks = <&clks 186>;
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};
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};
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};
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@ -119,7 +119,7 @@ enum imx5_clks {
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srtc_gate, pata_gate, sata_gate, spdif_xtal_sel, spdif0_sel,
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spdif1_sel, spdif0_pred, spdif0_podf, spdif1_pred, spdif1_podf,
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spdif0_com_s, spdif1_com_sel, spdif0_gate, spdif1_gate, spdif_ipg_gate,
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clk_max
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ocram, clk_max
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};
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static struct clk *clk[clk_max];
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@ -506,6 +506,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
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mx53_can_sel, ARRAY_SIZE(mx53_can_sel));
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clk[can1_serial_gate] = imx_clk_gate2("can1_serial_gate", "can_sel", MXC_CCM_CCGR6, 22);
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clk[can1_ipg_gate] = imx_clk_gate2("can1_ipg_gate", "ipg", MXC_CCM_CCGR6, 20);
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clk[ocram] = imx_clk_gate2("ocram", "ahb", MXC_CCM_CCGR6, 2);
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clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "can_sel", MXC_CCM_CCGR4, 8);
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clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 6);
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clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22);
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