Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/fsl-booke: Fix address issue when using relocatable kernels powerpc/cpm1: Mark micropatch code/data static and __init powerpc/cpm1: Fix build with various CONFIG_*_UCODE_PATCH combinations powerpc/cpm: Reintroduce global spi_pram struct (fixes build issue)
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commit
ea4c1a7e14
@ -6,6 +6,30 @@
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#include <linux/errno.h>
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#include <linux/of.h>
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/*
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* SPI Parameter RAM common to QE and CPM.
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*/
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struct spi_pram {
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__be16 rbase; /* Rx Buffer descriptor base address */
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__be16 tbase; /* Tx Buffer descriptor base address */
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u8 rfcr; /* Rx function code */
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u8 tfcr; /* Tx function code */
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__be16 mrblr; /* Max receive buffer length */
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__be32 rstate; /* Internal */
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__be32 rdp; /* Internal */
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__be16 rbptr; /* Internal */
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__be16 rbc; /* Internal */
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__be32 rxtmp; /* Internal */
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__be32 tstate; /* Internal */
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__be32 tdp; /* Internal */
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__be16 tbptr; /* Internal */
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__be16 tbc; /* Internal */
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__be32 txtmp; /* Internal */
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__be32 res; /* Tx temp. */
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__be16 rpbase; /* Relocation pointer (CPM1 only) */
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__be16 res1; /* Reserved */
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};
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/*
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* USB Controller pram common to QE and CPM.
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*/
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@ -17,6 +17,7 @@
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#ifndef __CPM1__
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#define __CPM1__
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#include <linux/init.h>
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#include <asm/8xx_immap.h>
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#include <asm/ptrace.h>
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#include <asm/cpm.h>
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@ -54,7 +55,7 @@ extern cpm8xx_t __iomem *cpmp; /* Pointer to comm processor */
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extern void cpm_setbrg(uint brg, uint rate);
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extern void cpm_load_patch(cpm8xx_t *cp);
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extern void __init cpm_load_patch(cpm8xx_t *cp);
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extern void cpm_reset(void);
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@ -205,8 +205,7 @@ next_tlb_setup:
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bdnz+ next_tlb_setup
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/* 7. Jump to our 1:1 mapping */
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li r6, 0
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mr r6, r25
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#else
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#error You need to specify the mapping or not use this at all.
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#endif
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@ -217,7 +216,6 @@ next_tlb_setup:
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1: mflr r9
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rlwimi r6,r9,0,20,31
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addi r6,r6,(2f - 1b)
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add r6, r6, r25
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mtspr SPRN_SRR0,r6
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mtspr SPRN_SRR1,r7
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rfi /* start execution out of TLB1[0] entry */
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@ -4,6 +4,7 @@
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* also relocates SMC2, but this would require additional changes
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* to uart.c, so I am holding off on that for a moment.
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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@ -16,6 +17,7 @@
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/8xx_immap.h>
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#include <asm/cpm.h>
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#include <asm/cpm1.h>
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/*
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@ -24,7 +26,7 @@
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#ifdef CONFIG_I2C_SPI_UCODE_PATCH
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uint patch_2000[] = {
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static uint patch_2000[] __initdata = {
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0x7FFFEFD9,
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0x3FFD0000,
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0x7FFB49F7,
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@ -143,7 +145,7 @@ uint patch_2000[] = {
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0x5F8247F8
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};
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uint patch_2f00[] = {
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static uint patch_2f00[] __initdata = {
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0x3E303430,
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0x34343737,
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0xABF7BF9B,
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@ -182,7 +184,7 @@ uint patch_2f00[] = {
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#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
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uint patch_2000[] = {
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static uint patch_2000[] __initdata = {
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0x3fff0000,
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0x3ffd0000,
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0x3ffb0000,
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@ -505,7 +507,7 @@ uint patch_2000[] = {
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0x6079e2bb
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};
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uint patch_2f00[] = {
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static uint patch_2f00[] __initdata = {
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0x30303030,
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0x3e3e3434,
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0xabbf9b99,
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@ -572,7 +574,7 @@ uint patch_2f00[] = {
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0xf22f3f23
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};
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uint patch_2e00[] = {
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static uint patch_2e00[] __initdata = {
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0x27eeeeee,
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0xeeeeeeee,
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0xeeeeeeee,
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@ -598,7 +600,7 @@ uint patch_2e00[] = {
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#ifdef CONFIG_USB_SOF_UCODE_PATCH
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uint patch_2000[] = {
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static uint patch_2000[] __initdata = {
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0x7fff0000,
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0x7ffd0000,
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0x7ffb0000,
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@ -613,21 +615,25 @@ uint patch_2000[] = {
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0x60750000
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};
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uint patch_2f00[] = {
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static uint patch_2f00[] __initdata = {
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0x3030304c,
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0xcab9e441,
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0xa1aaf220
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};
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#endif
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void
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cpm_load_patch(cpm8xx_t *cp)
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void __init cpm_load_patch(cpm8xx_t *cp)
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{
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volatile uint *dp; /* Dual-ported RAM. */
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volatile cpm8xx_t *commproc;
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#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \
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defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
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volatile iic_t *iip;
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volatile spi_t *spp;
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volatile struct spi_pram *spp;
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#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
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volatile smc_uart_t *smp;
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#endif
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#endif
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int i;
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commproc = cp;
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@ -668,8 +674,8 @@ cpm_load_patch(cpm8xx_t *cp)
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/* Put SPI above the IIC, also 32-byte aligned.
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*/
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i = (RPBASE + sizeof(iic_t) + 31) & ~31;
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spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
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spp->spi_rpbase = i;
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spp = (struct spi_pram *)&commproc->cp_dparam[PROFF_SPI];
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spp->rpbase = i;
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# if defined(CONFIG_I2C_SPI_UCODE_PATCH)
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commproc->cp_cpmcr1 = 0x802a;
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@ -66,28 +66,6 @@ struct mpc8xxx_spi_reg {
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__be32 receive;
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};
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/* SPI Parameter RAM */
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struct spi_pram {
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__be16 rbase; /* Rx Buffer descriptor base address */
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__be16 tbase; /* Tx Buffer descriptor base address */
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u8 rfcr; /* Rx function code */
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u8 tfcr; /* Tx function code */
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__be16 mrblr; /* Max receive buffer length */
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__be32 rstate; /* Internal */
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__be32 rdp; /* Internal */
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__be16 rbptr; /* Internal */
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__be16 rbc; /* Internal */
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__be32 rxtmp; /* Internal */
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__be32 tstate; /* Internal */
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__be32 tdp; /* Internal */
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__be16 tbptr; /* Internal */
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__be16 tbc; /* Internal */
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__be32 txtmp; /* Internal */
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__be32 res; /* Tx temp. */
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__be16 rpbase; /* Relocation pointer (CPM1 only) */
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__be16 res1; /* Reserved */
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};
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/* SPI Controller mode register definitions */
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#define SPMODE_LOOP (1 << 30)
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#define SPMODE_CI_INACTIVEHIGH (1 << 29)
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