ionic: reduce contiguous memory allocation requirement
Split out the queue descriptor blocks into separate dma allocations to make for smaller blocks. Co-developed-by: Neel Patel <neel@pensando.io> Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -112,7 +112,8 @@ static const struct debugfs_reg32 intr_ctrl_regs[] = {
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void ionic_debugfs_add_qcq(struct ionic_lif *lif, struct ionic_qcq *qcq)
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{
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struct dentry *q_dentry, *cq_dentry, *intr_dentry, *stats_dentry;
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struct dentry *qcq_dentry, *q_dentry, *cq_dentry;
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struct dentry *intr_dentry, *stats_dentry;
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struct ionic_dev *idev = &lif->ionic->idev;
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struct debugfs_regset32 *intr_ctrl_regset;
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struct ionic_intr_info *intr = &qcq->intr;
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@ -121,21 +122,21 @@ void ionic_debugfs_add_qcq(struct ionic_lif *lif, struct ionic_qcq *qcq)
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struct ionic_queue *q = &qcq->q;
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struct ionic_cq *cq = &qcq->cq;
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qcq->dentry = debugfs_create_dir(q->name, lif->dentry);
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qcq_dentry = debugfs_create_dir(q->name, lif->dentry);
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if (IS_ERR_OR_NULL(qcq_dentry))
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return;
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qcq->dentry = qcq_dentry;
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debugfs_create_x32("total_size", 0400, qcq->dentry, &qcq->total_size);
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debugfs_create_x64("base_pa", 0400, qcq->dentry, &qcq->base_pa);
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debugfs_create_x64("q_base_pa", 0400, qcq_dentry, &qcq->q_base_pa);
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debugfs_create_x32("q_size", 0400, qcq_dentry, &qcq->q_size);
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debugfs_create_x64("cq_base_pa", 0400, qcq_dentry, &qcq->cq_base_pa);
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debugfs_create_x32("cq_size", 0400, qcq_dentry, &qcq->cq_size);
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debugfs_create_x64("sg_base_pa", 0400, qcq_dentry, &qcq->sg_base_pa);
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debugfs_create_x32("sg_size", 0400, qcq_dentry, &qcq->sg_size);
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q_dentry = debugfs_create_dir("q", qcq->dentry);
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debugfs_create_u32("index", 0400, q_dentry, &q->index);
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debugfs_create_x64("base_pa", 0400, q_dentry, &q->base_pa);
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if (qcq->flags & IONIC_QCQ_F_SG) {
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debugfs_create_x64("sg_base_pa", 0400, q_dentry,
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&q->sg_base_pa);
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debugfs_create_u32("sg_desc_size", 0400, q_dentry,
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&q->sg_desc_size);
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}
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debugfs_create_u32("num_descs", 0400, q_dentry, &q->num_descs);
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debugfs_create_u32("desc_size", 0400, q_dentry, &q->desc_size);
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debugfs_create_u32("pid", 0400, q_dentry, &q->pid);
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@ -306,9 +306,23 @@ static void ionic_qcq_free(struct ionic_lif *lif, struct ionic_qcq *qcq)
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ionic_debugfs_del_qcq(qcq);
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dma_free_coherent(dev, qcq->total_size, qcq->base, qcq->base_pa);
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qcq->base = NULL;
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qcq->base_pa = 0;
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if (qcq->q_base) {
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dma_free_coherent(dev, qcq->q_size, qcq->q_base, qcq->q_base_pa);
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qcq->q_base = NULL;
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qcq->q_base_pa = 0;
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}
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if (qcq->cq_base) {
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dma_free_coherent(dev, qcq->cq_size, qcq->cq_base, qcq->cq_base_pa);
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qcq->cq_base = NULL;
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qcq->cq_base_pa = 0;
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}
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if (qcq->sg_base) {
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dma_free_coherent(dev, qcq->sg_size, qcq->sg_base, qcq->sg_base_pa);
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qcq->sg_base = NULL;
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qcq->sg_base_pa = 0;
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}
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if (qcq->flags & IONIC_QCQ_F_INTR) {
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irq_set_affinity_hint(qcq->intr.vector, NULL);
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@ -374,7 +388,6 @@ static int ionic_qcq_alloc(struct ionic_lif *lif, unsigned int type,
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unsigned int pid, struct ionic_qcq **qcq)
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{
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struct ionic_dev *idev = &lif->ionic->idev;
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u32 q_size, cq_size, sg_size, total_size;
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struct device *dev = lif->ionic->dev;
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void *q_base, *cq_base, *sg_base;
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dma_addr_t cq_base_pa = 0;
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@ -385,21 +398,6 @@ static int ionic_qcq_alloc(struct ionic_lif *lif, unsigned int type,
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*qcq = NULL;
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q_size = num_descs * desc_size;
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cq_size = num_descs * cq_desc_size;
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sg_size = num_descs * sg_desc_size;
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total_size = ALIGN(q_size, PAGE_SIZE) + ALIGN(cq_size, PAGE_SIZE);
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/* Note: aligning q_size/cq_size is not enough due to cq_base
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* address aligning as q_base could be not aligned to the page.
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* Adding PAGE_SIZE.
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*/
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total_size += PAGE_SIZE;
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if (flags & IONIC_QCQ_F_SG) {
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total_size += ALIGN(sg_size, PAGE_SIZE);
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total_size += PAGE_SIZE;
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}
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new = devm_kzalloc(dev, sizeof(*new), GFP_KERNEL);
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if (!new) {
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netdev_err(lif->netdev, "Cannot allocate queue structure\n");
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@ -414,7 +412,7 @@ static int ionic_qcq_alloc(struct ionic_lif *lif, unsigned int type,
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if (!new->q.info) {
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netdev_err(lif->netdev, "Cannot allocate queue info\n");
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err = -ENOMEM;
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goto err_out;
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goto err_out_free_qcq;
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}
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new->q.type = type;
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@ -423,7 +421,7 @@ static int ionic_qcq_alloc(struct ionic_lif *lif, unsigned int type,
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desc_size, sg_desc_size, pid);
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if (err) {
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netdev_err(lif->netdev, "Cannot initialize queue\n");
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goto err_out;
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goto err_out_free_q_info;
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}
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if (flags & IONIC_QCQ_F_INTR) {
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@ -471,46 +469,68 @@ static int ionic_qcq_alloc(struct ionic_lif *lif, unsigned int type,
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err = ionic_cq_init(lif, &new->cq, &new->intr, num_descs, cq_desc_size);
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if (err) {
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netdev_err(lif->netdev, "Cannot initialize completion queue\n");
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goto err_out_free_irq;
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goto err_out_free_cq_info;
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}
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new->base = dma_alloc_coherent(dev, total_size, &new->base_pa,
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GFP_KERNEL);
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if (!new->base) {
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new->q_size = PAGE_SIZE + (num_descs * desc_size);
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new->q_base = dma_alloc_coherent(dev, new->q_size, &new->q_base_pa,
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GFP_KERNEL);
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if (!new->q_base) {
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netdev_err(lif->netdev, "Cannot allocate queue DMA memory\n");
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err = -ENOMEM;
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goto err_out_free_irq;
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goto err_out_free_cq_info;
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}
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new->total_size = total_size;
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q_base = new->base;
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q_base_pa = new->base_pa;
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cq_base = (void *)ALIGN((uintptr_t)q_base + q_size, PAGE_SIZE);
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cq_base_pa = ALIGN(q_base_pa + q_size, PAGE_SIZE);
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if (flags & IONIC_QCQ_F_SG) {
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sg_base = (void *)ALIGN((uintptr_t)cq_base + cq_size,
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PAGE_SIZE);
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sg_base_pa = ALIGN(cq_base_pa + cq_size, PAGE_SIZE);
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ionic_q_sg_map(&new->q, sg_base, sg_base_pa);
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}
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q_base = PTR_ALIGN(new->q_base, PAGE_SIZE);
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q_base_pa = ALIGN(new->q_base_pa, PAGE_SIZE);
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ionic_q_map(&new->q, q_base, q_base_pa);
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new->cq_size = PAGE_SIZE + (num_descs * cq_desc_size);
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new->cq_base = dma_alloc_coherent(dev, new->cq_size, &new->cq_base_pa,
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GFP_KERNEL);
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if (!new->cq_base) {
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netdev_err(lif->netdev, "Cannot allocate cq DMA memory\n");
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err = -ENOMEM;
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goto err_out_free_q;
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}
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cq_base = PTR_ALIGN(new->cq_base, PAGE_SIZE);
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cq_base_pa = ALIGN(new->cq_base_pa, PAGE_SIZE);
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ionic_cq_map(&new->cq, cq_base, cq_base_pa);
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ionic_cq_bind(&new->cq, &new->q);
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if (flags & IONIC_QCQ_F_SG) {
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new->sg_size = PAGE_SIZE + (num_descs * sg_desc_size);
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new->sg_base = dma_alloc_coherent(dev, new->sg_size, &new->sg_base_pa,
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GFP_KERNEL);
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if (!new->sg_base) {
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netdev_err(lif->netdev, "Cannot allocate sg DMA memory\n");
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err = -ENOMEM;
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goto err_out_free_cq;
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}
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sg_base = PTR_ALIGN(new->sg_base, PAGE_SIZE);
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sg_base_pa = ALIGN(new->sg_base_pa, PAGE_SIZE);
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ionic_q_sg_map(&new->q, sg_base, sg_base_pa);
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}
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*qcq = new;
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return 0;
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err_out_free_cq:
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dma_free_coherent(dev, new->cq_size, new->cq_base, new->cq_base_pa);
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err_out_free_q:
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dma_free_coherent(dev, new->q_size, new->q_base, new->q_base_pa);
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err_out_free_cq_info:
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devm_kfree(dev, new->cq.info);
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err_out_free_irq:
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if (flags & IONIC_QCQ_F_INTR)
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devm_free_irq(dev, new->intr.vector, &new->napi);
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err_out_free_intr:
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if (flags & IONIC_QCQ_F_INTR)
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ionic_intr_free(lif->ionic, new->intr.index);
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err_out_free_q_info:
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devm_kfree(dev, new->q.info);
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err_out_free_qcq:
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devm_kfree(dev, new);
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err_out:
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dev_err(dev, "qcq alloc of %s%d failed %d\n", name, index, err);
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return err;
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@ -57,9 +57,15 @@ struct ionic_napi_stats {
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};
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struct ionic_qcq {
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void *base;
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dma_addr_t base_pa;
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unsigned int total_size;
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void *q_base;
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dma_addr_t q_base_pa;
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u32 q_size;
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void *cq_base;
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dma_addr_t cq_base_pa;
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u32 cq_size;
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void *sg_base;
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dma_addr_t sg_base_pa;
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u32 sg_size;
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struct ionic_queue q;
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struct ionic_cq cq;
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struct ionic_intr_info intr;
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