regulator: mt6358: Use linear voltage helpers for single range regulators
Some of the regulators on the MT6358/MT6366 PMICs have just one linear voltage range. These are the bulk regulators and VSRAM_* LDOs. Currently they are modeled with one linear range, but also have their minimum, maximum, and step voltage described. Convert them to the linear voltage helpers. These helpers are a bit simpler, and we can also drop the linear range definitions. Also reflow the touched lines now that they are shorter. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230609083009.2822259-7-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Chen-Yu Tsai
Mark Brown
parent
1ff35e66ca
commit
ea861df772
@ -37,7 +37,7 @@ struct mt6358_regulator_info {
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#define to_regulator_info(x) container_of((x), struct mt6358_regulator_info, desc)
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#define MT6358_BUCK(match, vreg, min, max, step, \
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volt_ranges, vosel_mask, _da_vsel_reg, _da_vsel_mask, \
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vosel_mask, _da_vsel_reg, _da_vsel_mask, \
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_modeset_reg, _modeset_shift) \
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[MT6358_ID_##vreg] = { \
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.desc = { \
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@ -48,8 +48,8 @@ struct mt6358_regulator_info {
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.id = MT6358_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.min_uV = (min), \
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.uV_step = (step), \
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.vsel_reg = MT6358_BUCK_##vreg##_ELR0, \
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.vsel_mask = vosel_mask, \
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.enable_reg = MT6358_BUCK_##vreg##_CON0, \
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@ -89,7 +89,7 @@ struct mt6358_regulator_info {
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}
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#define MT6358_LDO1(match, vreg, min, max, step, \
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volt_ranges, _da_vsel_reg, _da_vsel_mask, \
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_da_vsel_reg, _da_vsel_mask, \
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vosel, vosel_mask) \
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[MT6358_ID_##vreg] = { \
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.desc = { \
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@ -100,8 +100,8 @@ struct mt6358_regulator_info {
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.id = MT6358_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.min_uV = (min), \
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.uV_step = (step), \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = MT6358_LDO_##vreg##_CON0, \
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@ -133,7 +133,7 @@ struct mt6358_regulator_info {
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}
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#define MT6366_BUCK(match, vreg, min, max, step, \
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volt_ranges, vosel_mask, _da_vsel_reg, _da_vsel_mask, \
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vosel_mask, _da_vsel_reg, _da_vsel_mask, \
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_modeset_reg, _modeset_shift) \
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[MT6366_ID_##vreg] = { \
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.desc = { \
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@ -144,8 +144,8 @@ struct mt6358_regulator_info {
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.id = MT6366_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.min_uV = (min), \
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.uV_step = (step), \
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.vsel_reg = MT6358_BUCK_##vreg##_ELR0, \
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.vsel_mask = vosel_mask, \
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.enable_reg = MT6358_BUCK_##vreg##_CON0, \
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@ -185,7 +185,7 @@ struct mt6358_regulator_info {
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}
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#define MT6366_LDO1(match, vreg, min, max, step, \
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volt_ranges, _da_vsel_reg, _da_vsel_mask, \
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_da_vsel_reg, _da_vsel_mask, \
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vosel, vosel_mask) \
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[MT6366_ID_##vreg] = { \
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.desc = { \
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@ -196,8 +196,8 @@ struct mt6358_regulator_info {
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.id = MT6366_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.min_uV = (min), \
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.uV_step = (step), \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = MT6358_LDO_##vreg##_CON0, \
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@ -228,21 +228,6 @@ struct mt6358_regulator_info {
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.qi = BIT(15), \
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}
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static const struct linear_range buck_volt_range1[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250),
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};
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static const struct linear_range buck_volt_range2[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 12500),
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};
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static const struct linear_range buck_volt_range3[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
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};
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static const struct linear_range buck_volt_range4[] = {
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REGULATOR_LINEAR_RANGE(1000000, 0, 0x7f, 12500),
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};
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static const unsigned int vdram2_voltages[] = {
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600000, 1800000,
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@ -466,8 +451,8 @@ static unsigned int mt6358_regulator_get_mode(struct regulator_dev *rdev)
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}
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static const struct regulator_ops mt6358_volt_range_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.map_voltage = regulator_map_voltage_linear_range,
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.list_voltage = regulator_list_voltage_linear,
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.map_voltage = regulator_map_voltage_linear,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = mt6358_get_buck_voltage_sel,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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@ -502,32 +487,23 @@ static const struct regulator_ops mt6358_volt_fixed_ops = {
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/* The array is indexed by id(MT6358_ID_XXX) */
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static const struct mt6358_regulator_info mt6358_regulators[] = {
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MT6358_BUCK("buck_vdram1", VDRAM1, 500000, 2087500, 12500,
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buck_volt_range2, 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f,
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MT6358_VDRAM1_ANA_CON0, 8),
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0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f, MT6358_VDRAM1_ANA_CON0, 8),
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MT6358_BUCK("buck_vcore", VCORE, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f,
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MT6358_VCORE_VGPU_ANA_CON0, 1),
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0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 1),
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MT6358_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
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buck_volt_range3, 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f,
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MT6358_VPA_ANA_CON0, 3),
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0x3f, MT6358_BUCK_VPA_DBG0, 0x3f, MT6358_VPA_ANA_CON0, 3),
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MT6358_BUCK("buck_vproc11", VPROC11, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f,
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MT6358_VPROC_ANA_CON0, 1),
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0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 1),
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MT6358_BUCK("buck_vproc12", VPROC12, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f,
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MT6358_VPROC_ANA_CON0, 2),
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0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 2),
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MT6358_BUCK("buck_vgpu", VGPU, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f,
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MT6358_VCORE_VGPU_ANA_CON0, 2),
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0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 2),
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MT6358_BUCK("buck_vs2", VS2, 500000, 2087500, 12500,
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buck_volt_range2, 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f,
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MT6358_VS2_ANA_CON0, 8),
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0x7f, MT6358_BUCK_VS2_DBG0, 0x7f, MT6358_VS2_ANA_CON0, 8),
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MT6358_BUCK("buck_vmodem", VMODEM, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f,
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MT6358_VMODEM_ANA_CON0, 8),
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0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8),
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MT6358_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500,
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buck_volt_range4, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f,
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MT6358_VS1_ANA_CON0, 8),
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0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8),
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MT6358_REG_FIXED("ldo_vrf12", VRF12,
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MT6358_LDO_VRF12_CON0, 0, 1200000),
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MT6358_REG_FIXED("ldo_vio18", VIO18,
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@ -577,48 +553,35 @@ static const struct mt6358_regulator_info mt6358_regulators[] = {
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MT6358_LDO("ldo_vsim2", VSIM2, vsim_voltages, vsim_idx,
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MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00),
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MT6358_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250,
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buck_volt_range1, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00,
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MT6358_LDO_VSRAM_CON0, 0x7f),
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MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f),
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MT6358_LDO1("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750, 6250,
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buck_volt_range1, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00,
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MT6358_LDO_VSRAM_CON2, 0x7f),
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MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f),
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MT6358_LDO1("ldo_vsram_gpu", VSRAM_GPU, 500000, 1293750, 6250,
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buck_volt_range1, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00,
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MT6358_LDO_VSRAM_CON3, 0x7f),
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MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f),
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MT6358_LDO1("ldo_vsram_proc12", VSRAM_PROC12, 500000, 1293750, 6250,
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buck_volt_range1, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00,
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MT6358_LDO_VSRAM_CON1, 0x7f),
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MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f),
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};
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/* The array is indexed by id(MT6366_ID_XXX) */
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static const struct mt6358_regulator_info mt6366_regulators[] = {
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MT6366_BUCK("buck_vdram1", VDRAM1, 500000, 2087500, 12500,
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buck_volt_range2, 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f,
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MT6358_VDRAM1_ANA_CON0, 8),
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0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f, MT6358_VDRAM1_ANA_CON0, 8),
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MT6366_BUCK("buck_vcore", VCORE, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f,
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MT6358_VCORE_VGPU_ANA_CON0, 1),
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0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 1),
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MT6366_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
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buck_volt_range3, 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f,
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MT6358_VPA_ANA_CON0, 3),
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0x3f, MT6358_BUCK_VPA_DBG0, 0x3f, MT6358_VPA_ANA_CON0, 3),
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MT6366_BUCK("buck_vproc11", VPROC11, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f,
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MT6358_VPROC_ANA_CON0, 1),
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0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 1),
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MT6366_BUCK("buck_vproc12", VPROC12, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f,
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MT6358_VPROC_ANA_CON0, 2),
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0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 2),
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MT6366_BUCK("buck_vgpu", VGPU, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f,
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MT6358_VCORE_VGPU_ANA_CON0, 2),
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0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 2),
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MT6366_BUCK("buck_vs2", VS2, 500000, 2087500, 12500,
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buck_volt_range2, 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f,
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MT6358_VS2_ANA_CON0, 8),
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0x7f, MT6358_BUCK_VS2_DBG0, 0x7f, MT6358_VS2_ANA_CON0, 8),
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MT6366_BUCK("buck_vmodem", VMODEM, 500000, 1293750, 6250,
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buck_volt_range1, 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f,
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MT6358_VMODEM_ANA_CON0, 8),
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0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8),
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MT6366_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500,
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buck_volt_range4, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f,
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MT6358_VS1_ANA_CON0, 8),
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0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8),
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MT6366_REG_FIXED("ldo_vrf12", VRF12,
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MT6358_LDO_VRF12_CON0, 0, 1200000),
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MT6366_REG_FIXED("ldo_vio18", VIO18,
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@ -657,17 +620,13 @@ static const struct mt6358_regulator_info mt6366_regulators[] = {
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MT6366_LDO("ldo_vsim2", VSIM2, vsim_voltages, vsim_idx,
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MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00),
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MT6366_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250,
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buck_volt_range1, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00,
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MT6358_LDO_VSRAM_CON0, 0x7f),
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MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f),
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MT6366_LDO1("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750, 6250,
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buck_volt_range1, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00,
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MT6358_LDO_VSRAM_CON2, 0x7f),
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MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f),
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MT6366_LDO1("ldo_vsram_gpu", VSRAM_GPU, 500000, 1293750, 6250,
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buck_volt_range1, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00,
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MT6358_LDO_VSRAM_CON3, 0x7f),
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MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f),
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MT6366_LDO1("ldo_vsram_proc12", VSRAM_PROC12, 500000, 1293750, 6250,
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buck_volt_range1, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00,
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MT6358_LDO_VSRAM_CON1, 0x7f),
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MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f),
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};
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static int mt6358_sync_vcn33_setting(struct device *dev)
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