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drm/i915/dg2: Introduce Wa_18017747507

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WA 18017747507 applies to all DG2 skus.

BSpec: 56035, 46121, 68173

Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221031131509.3411195-1-wayne.boyer@intel.com
This commit is contained in:
Wayne Boyer 2022-10-31 06:15:09 -07:00 committed by Matt Roper
parent 3096ae43cc
commit ea9c6215ac
2 changed files with 6 additions and 0 deletions
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3
drivers/gpu/drm/i915/gt/intel_gt_regs.h
View File

@ -498,6 +498,9 @@
#define VF_PREEMPTION _MMIO(0x83a4)
#define PREEMPTION_VERTEX_COUNT REG_GENMASK(15, 0)
#define VFG_PREEMPTION_CHICKEN _MMIO(0x83b4)
#define POLYGON_TRIFAN_LINELOOP_DISABLE REG_BIT(4)
#define GEN8_RC6_CTX_INFO _MMIO(0x8504)
#define XEHP_SQCM MCR_REG(0x8724)

3
drivers/gpu/drm/i915/gt/intel_workarounds.c
View File

@ -2975,6 +2975,9 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li
* Wa_22015475538:dg2
*/
wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0_UDW, DIS_CHAIN_2XSIMD8);
/* Wa_18017747507:dg2 */
wa_masked_en(wal, VFG_PREEMPTION_CHICKEN, POLYGON_TRIFAN_LINELOOP_DISABLE);
}
}