From eb885f5ef73b1716d34f872ca37ac0b1a6e8cf2e Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Sun, 23 Aug 2020 17:47:22 +0300 Subject: [PATCH] ARM: tegra: acer-a500: Correct PINCTRL configuration The low-power-mode drive was set to DIV_4 for some of PINCTRL groups, while these groups should use DIV_1. This patch fixes the wrong PINCTRL configurations and adds a full drive-setup for the changed configs, just for completeness since the added values match the default configuration. Now WiFi SDIO communication works properly using legacy signaling mode if SDIO BUS clocked at 50MHz, which is a maximum SDIO clock rate on Tegra20. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts index d380ae1f9437..bc7c1d082828 100644 --- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts @@ -318,16 +318,24 @@ nvidia,pins = "drive_ddc", "drive_vi1", "drive_sdio1"; + nvidia,pull-up-strength = <31>; + nvidia,pull-down-strength = <31>; nvidia,schmitt = ; - nvidia,low-power-mode = ; + nvidia,high-speed-mode = ; + nvidia,low-power-mode = ; + nvidia,slew-rate-rising = ; + nvidia,slew-rate-falling = ; }; drive_dbg { nvidia,pins = "drive_dbg", "drive_vi2", "drive_at1", "drive_ao1"; + nvidia,pull-up-strength = <31>; + nvidia,pull-down-strength = <31>; nvidia,schmitt = ; - nvidia,low-power-mode = ; + nvidia,high-speed-mode = ; + nvidia,low-power-mode = ; nvidia,slew-rate-rising = ; nvidia,slew-rate-falling = ; };