staging: comedi: drivers: add PLX PCI 9080 DMATHR register values
Add macros in "plx9080.h" that define values for the DMATHR register values. Use the prefix `PLX_DMATHR_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -543,6 +543,47 @@ struct plx_dma_desc {
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/* DMA Threshold Register */
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#define PLX_REG_DMATHR 0x00b0
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/*
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* DMA Threshold constraints:
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* (C0PLAF + 1) + (C0PLAE + 1) <= 32
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* (C0LPAF + 1) + (C0LPAE + 1) <= 32
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* (C1PLAF + 1) + (C1PLAE + 1) <= 16
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* (C1LPAF + 1) + (C1LPAE + 1) <= 16
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*/
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/* DMA Channel 0 PCI-to-Local Almost Full (divided by 2, minus 1) */
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#define PLX_DMATHR_C0PLAF(x) (BIT(0) * ((x) & 0xf))
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#define PLX_DMATHR_C0PLAF_MASK GENMASK(3, 0)
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#define PLX_DMATHR_C0PLAF_SHIFT 0
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/* DMA Channel 0 Local-to-PCI Almost Empty (divided by 2, minus 1) */
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#define PLX_DMATHR_C0LPAE(x) (BIT(4) * ((x) & 0xf))
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#define PLX_DMATHR_C0LPAE_MASK GENMASK(7, 4)
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#define PLX_DMATHR_C0LPAE_SHIFT 4
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/* DMA Channel 0 Local-to-PCI Almost Full (divided by 2, minus 1) */
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#define PLX_DMATHR_C0LPAF(x) (BIT(8) * ((x) & 0xf))
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#define PLX_DMATHR_C0LPAF_MASK GENMASK(11, 8)
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#define PLX_DMATHR_C0LPAF_SHIFT 8
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/* DMA Channel 0 PCI-to-Local Almost Empty (divided by 2, minus 1) */
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#define PLX_DMATHR_C0PLAE(x) (BIT(12) * ((x) & 0xf))
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#define PLX_DMATHR_C0PLAE_MASK GENMASK(15, 12)
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#define PLX_DMATHR_C0PLAE_SHIFT 12
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/* DMA Channel 1 PCI-to-Local Almost Full (divided by 2, minus 1) */
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#define PLX_DMATHR_C1PLAF(x) (BIT(16) * ((x) & 0xf))
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#define PLX_DMATHR_C1PLAF_MASK GENMASK(19, 16)
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#define PLX_DMATHR_C1PLAF_SHIFT 16
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/* DMA Channel 1 Local-to-PCI Almost Empty (divided by 2, minus 1) */
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#define PLX_DMATHR_C1LPAE(x) (BIT(20) * ((x) & 0xf))
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#define PLX_DMATHR_C1LPAE_MASK GENMASK(23, 20)
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#define PLX_DMATHR_C1LPAE_SHIFT 20
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/* DMA Channel 1 Local-to-PCI Almost Full (divided by 2, minus 1) */
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#define PLX_DMATHR_C1LPAF(x) (BIT(24) * ((x) & 0xf))
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#define PLX_DMATHR_C1LPAF_MASK GENMASK(27, 24)
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#define PLX_DMATHR_C1LPAF_SHIFT 24
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/* DMA Channel 1 PCI-to-Local Almost Empty (divided by 2, minus 1) */
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#define PLX_DMATHR_C1PLAE(x) (BIT(28) * ((x) & 0xf))
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#define PLX_DMATHR_C1PLAE_MASK GENMASK(31, 28)
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#define PLX_DMATHR_C1PLAE_SHIFT 28
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/*
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* Messaging Queue Registers OPLFIS, OPLFIM, IQP, OQP, MQCR, QBAR, IFHPR,
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* IFTPR, IPHPR, IPTPR, OFHPR, OFTPR, OPHPR, OPTPR, and QSR have been omitted.
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